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Observer
Observer
16,054 Views
Registered: ‎09-30-2008

TFT-Display with EDK xps_tft IP-Core?

Hi together,

I have a Virtex 5 ML509 Board with included Chrontel CH7301C Controller Chip for the DVI Interface.

I'm building a system with EDK with a Microblaze and 1MB of SRAM with the Base Ssystem Builder.

Then I'm adding the IP-Core  XPS_TFT out of the IP-Catalog and i connect it to the PLB-Bus.

Afterwards i made most of the tft-ports external and added the corresponding lines in the UCF-file to connect them to the FPGA-Pins.

I used as well the clock generator to generate a 25 MHz clock and connected it to SYS_TFT_CLK since the dataseet mentioned a 25 Mhz clock for this module.

Afterwards I'm configuring the IP Core and i write in the base-address of the SRAM because in the datasheet of the XPS_TFT is mentioned a Video memory.

After synthesising i open the Software Platform Studio and I create a new projekt and I Import all the files from edk\sw\XilinxProcessorLib\tft_v1_00_a

 

In this folder there is also an example C-Code for using this IP-Core. Now what i want to do is: Getting this example work!!!

I imported the example as well in my software projekt and loaded it on the Virtex5.

I inserted in the main-funtion some Words which are send over UART to the hyper Terminal. I can see this words so I know that there was no problem compiling the projekt. But my TFT-Screen keeps dark :-(

 

Now I'm trying to get this example work for nearly a week and I can't think of any other idea to try. So does anybody have experience with TFT-Controll or does anybody know how to get this example work?

I'm thankful for every respons!

 

Regards

Uli

 

 

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Observer
Observer
16,039 Views
Registered: ‎08-16-2007

Re: TFT-Display with EDK xps_tft IP-Core?

You are going to need more memory space.  The frame data resides on a 2 MB buffer so 1 MB of SRAM will not draw the whole screen.  I have attached a project that uses the 1MB SRAM for the ML507 board.  Use this project to compare to yours.  Run the colorbar code and you will see half the screen get filled with a colorbar.

 

Again you need to have at least 2 MB of memory to run this correctly xps_tft controller.

 

 

 

Observer
Observer
16,011 Views
Registered: ‎09-30-2008

Re: TFT-Display with EDK xps_tft IP-Core?

Hi cnakaj2,

thank you very much for your project! It was able to find my errors and the colorbar worked. You made my day!

But I have another simple question:

 

I compared your UCF-file to mine:

 

My UCF-File:

 ------------------------------------------------------------

#### Module xps_tft_0 constraints

Net xps_tft_0_TFT_DE_pin LOC = AE8;
Net xps_tft_0_TFT_HSYNC_pin LOC = AM12;
Net xps_tft_0_TFT_VSYNC_pin LOC = AM11;
Net xps_tft_0_TFT_IIC_SCL LOC = U27 | PULLUP;
Net xps_tft_0_TFT_IIC_SDA LOC = T29 | PULLUP;
Net xps_tft_0_TFT_DVI_CLK_P_pin LOC = AL11;
Net xps_tft_0_TFT_DVI_CLK_N_pin LOC = AL10;
Net xps_tft_0_TFT_DVI_DATA_pin<0> LOC = AB8;
Net xps_tft_0_TFT_DVI_DATA_pin<1> LOC = AC8;
Net xps_tft_0_TFT_DVI_DATA_pin<2> LOC = AN12;
Net xps_tft_0_TFT_DVI_DATA_pin<3> LOC = AP12;
Net xps_tft_0_TFT_DVI_DATA_pin<4> LOC = AA9;
Net xps_tft_0_TFT_DVI_DATA_pin<5> LOC = AA8;
Net xps_tft_0_TFT_DVI_DATA_pin<6> LOC = AM13;
Net xps_tft_0_TFT_DVI_DATA_pin<7> LOC = AN13;
Net xps_tft_0_TFT_DVI_DATA_pin<8> LOC = AA10;
Net xps_tft_0_TFT_DVI_DATA_pin<9> LOC = AB10;
Net xps_tft_0_TFT_DVI_DATA_pin<10> LOC = AP14;
Net xps_tft_0_TFT_DVI_DATA_pin<11> LOC = AN14;

 ----------------------------------------------------------------

 

Your UCF-File:

 

NET xps_tft_0_TFT_DVI_DATA_pin<0>  LOC = AB8;
NET xps_tft_0_TFT_DVI_DATA_pin<1>  LOC = AC8;
NET xps_tft_0_TFT_DVI_DATA_pin<2>  LOC = AN12;
NET xps_tft_0_TFT_DVI_DATA_pin<3>  LOC = AP12;
NET xps_tft_0_TFT_DVI_DATA_pin<4>  LOC = AA9;
NET xps_tft_0_TFT_DVI_DATA_pin<5>  LOC = AA8;
NET xps_tft_0_TFT_DVI_DATA_pin<6>  LOC = AM13;
NET xps_tft_0_TFT_DVI_DATA_pin<7>  LOC = AN13;
NET xps_tft_0_TFT_DVI_DATA_pin<8>  LOC = AA10;
NET xps_tft_0_TFT_DVI_DATA_pin<9>  LOC = AB10;
NET xps_tft_0_TFT_DVI_DATA_pin<10> LOC = AP14;
NET xps_tft_0_TFT_DVI_DATA_pin<11> LOC = AN14;
NET xps_tft_0_TFT_DVI_DATA_pin<*> IOSTANDARD = LVDCI_33;

NET xps_tft_0_TFT_DVI_CLK_P_pin LOC = AL11;
NET xps_tft_0_TFT_DVI_CLK_P_pin IOSTANDARD = LVCMOS33 | DRIVE = 24 | SLEW = FAST;
NET xps_tft_0_TFT_DVI_CLK_N_pin LOC = AL10;
NET xps_tft_0_TFT_DVI_CLK_N_pin IOSTANDARD = LVCMOS33 | DRIVE = 24 | SLEW = FAST;

NET xps_tft_0_TFT_HSYNC_pin LOC = AM12;
NET xps_tft_0_TFT_HSYNC_pin IOSTANDARD = LVDCI_33;
NET xps_tft_0_TFT_VSYNC_pin LOC = AM11;
NET xps_tft_0_TFT_VSYNC_pin IOSTANDARD = LVDCI_33;
NET xps_tft_0_TFT_DE_pin    LOC = AE8;
NET xps_tft_0_TFT_DE_pin    IOSTANDARD = LVDCI_33;
NET xps_tft_0_reset_pin LOC = AK6;
NET xps_tft_0_reset_pin IOSTANDARD = LVCMOS33;

----------------------------------------------------------------------

 

Now as I can see you did write more information in the UCF file than I did.

I am wondering where you got all the additional information from?

How did you know for example  the IOSTANDARD, DRIVE and SLEW parameters. Are they in a datasheet that I did not find?

Or did the EDK generate automatically your UCF-file. If yes, what did you do to have it generated?

In my case I did write in by hand all the information related to the TFT-IP-Core.

Hope you can answer that question as well and thanks again for the project.

Regards

Uli

 

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Observer
Observer
16,002 Views
Registered: ‎08-16-2007

Re: TFT-Display with EDK xps_tft IP-Core?

 If you look at the ml505/ml507 reference designs, they use a "beta" version of the tft controller.  So using the ml505/ml507 reference designs UCF file you can extract this data.
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Visitor
Visitor
14,177 Views
Registered: ‎09-09-2009

Re: TFT-Display with EDK xps_tft IP-Core?

Hi,
I dont wanna use the DVI data pins..instead i want to use the xps_tft R G B 6 pins for each and the vga clock..do u know where i can find a ucf file for these connections??
Also uliuni where did u find the tft_reeset_pin..its not present in the ports of the xps_tft controller when i checked in the ports tab?? so i removed that from the ucf file u were using.

Regards,

Shashwat. 

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Visitor
Visitor
14,146 Views
Registered: ‎09-11-2009

Re: TFT-Display with EDK xps_tft IP-Core?

Hi ,

 

shashwat: the restt pin is used for the chrontel video converter.  This converter have a resett pin which requires a high signal to work. If the rest pin is low the converter cant wok and you cant get an video signal. And if u want to use the RGB  signals on a XUPV5 , there is no way it can work. only the DVi signals are going out to the chrontal converter whis is connected to the dvi port. this converter also gives out DVi AND RGB signals (the vga port on the board is only an input).

 

But i have a question to.

 

the projekt of uliuni helpt me a lot.

 

but now there is a problem.

If i draw a line accross the monitor whith a code like this:  

 

int i;

while (i<=480)
{
        XTft_SetPixel(&TftInstance,i,i,0x00ffffff) ;    
    i++;
}

 

 

There is cumming out more then  there should be.

It looks like as the upper an the lower video  memory MB is the same, because if i only draw 1 pixel  there are again 2 . 

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Visitor
Visitor
14,012 Views
Registered: ‎09-11-2009

Re: TFT-Display with EDK xps_tft IP-Core?

Hi,

 

I also benefit from uliuni.zip demo.

At this time, I'd like to make the same demo with ppc440.

However, it does not work (I build and run colorbar/src/system.c without any modification)

 

So, I have some questions.

- in the .mhs file of the uliuni.zip demo, in the line PORT xps_tft_0_reset_pin = net_vcc required?

- in the generated .mhs file for ppc440, the CLKOUT0, 1, 2 all are occupied for proc_clk_s, ppc440_0_CPMINTERCONNECTCLK, sys_clk_s, repectively. Thus, the space for the port of xps_tft_0_SYS_TFT_Clk does not exist. How to solve this problem (I don't want an external oscillator, I'd like to use an internal clock module)

- On generating Bitstream, there happen error due to the following lines

 NET xps_tft_0_TFT_IIC_SCL  LOC = U27;
NET xps_tft_0_TFT_IIC_SDA  LOC = T29;
NET xps_tft_0_TFT_IIC_SCL  SLEW = SLOW;
NET xps_tft_0_TFT_IIC_SCL  DRIVE = 6;
NET xps_tft_0_TFT_IIC_SCL  TIG;
NET xps_tft_0_TFT_IIC_SCL  IOSTANDARD = LVCMOS18 ; #ff LVCMOS33;
NET xps_tft_0_TFT_IIC_SDA  SLEW = SLOW;
NET xps_tft_0_TFT_IIC_SDA  DRIVE = 6;
NET xps_tft_0_TFT_IIC_SDA  TIG;
NET xps_tft_0_TFT_IIC_SDA  IOSTANDARD = LVCMOS18 ; #ff LVCMOS33;

erro messasge notices that they are not defined or spelling mistake but It prove not to be spelling mistake apparently after check.

- if anyone makes the demo with ppc440 and upload, it will be very helpful to me :)

 

Thanks in advance

Best regards,

Lee.

 

 

 

  

 

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Visitor
Visitor
14,009 Views
Registered: ‎09-09-2009

Re: TFT-Display with EDK xps_tft IP-Core?

Hey Jaesung lee,

I have done it. First tell me what memory on board are u using?? SRAM or DDR2RAM ?? if you use on board SRAM which is 1 MB on ML507 you will get only half the colourbar on screen. This is because each image is 2MB in size(assuming 1024x512 with display part only being 640x480). All this is mentioned in the xps_tft documentation in more detail. In the clock manager u need to make a new clock connection and set that to 25Mhz and set that connection as the clock of sys_tft_clk. Also you are getting an error because in the ports of the tft controller u need to set the IIC_SCL and IIC_SDA ports as external so that they can configure the chrontel d/a converter. Along with these u also need to make tft_de,tft_clk_dvi_p,tft_clk_dvi_n(the syncrhonization signals),tft_Dvi_data as external..and YES RESET is needed...see the reply before this for info on that..use the same ucf file as given in the uliuni.zip file..its not too hard..most of the stuff is done by the BSB..infact the whole of EDK is like that..huge black boxes..u really need to read all the documentation and try ur best at understandin from the basics..i.e. master vlsi/embdded design..everythin is made for u here..its a brilliant tool..edk, ise ..basically eveyrthin :P..apart from this last part i hope the rest of the info helps :P

Regards,

Shashwat. 

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Visitor
Visitor
14,005 Views
Registered: ‎09-11-2009

Re: TFT-Display with EDK xps_tft IP-Core?

Hello, Shashwat

 

I'm using ML507 and 1M SRAM. And I know the half-size display (it is not a problem to me).

 

I have read documets you mentioned

  

In the clock manager u need to make a new clock connection and set that to 25Mhz and set that connection as the clock of sys_tft_clk.

-> thank you I will try 

 

Also you are getting an error because in the ports of the tft controller u need to set the IIC_SCL and IIC_SDA ports as external so that they can configure the chrontel d/a converter.

-> I already did it but it still shows errors, I think it is because of '_pin' missing (other ucf signals are all '_pin' out but only these IIC related signals are not '_pin' out)

 

Along with these u also need to make tft_de,tft_clk_dvi_p,tft_clk_dvi_n(the syncrhonization signals),tft_Dvi_data as external..

-> already done so

 

I also leave the RESET signals as it is

 

I think that the major problem is the 25Mhz  clock missing.

 

For the 25Mhz clock, should another clock generator be instantiated?

Without 25Mhz clock, the control register can be read/written? (for testing with sw code first)

 

Thank you

Best regards,

Lee.

  

 

 

 

 

 

 

 

 

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Visitor
Visitor
13,993 Views
Registered: ‎09-09-2009

Re: TFT-Display with EDK xps_tft IP-Core?

Hey
No, A clock is required definitely. And no, u dont need a second instance of the clock generator..1 clock generator for the entire system does it.. u just need extra clock signals from within the clock generator..its all a black box sadly..u just generate separate clock signals for ip's u add from a ip catalog..the ones from the bsb gen are handled by the bsb entirely..so within the same clock generator..make a new signal..set it to 25 Mhz and give it to the sys_tft_clk port. U will see the corresponding change in the ports tab in the system assembly view.


Im not too sure about what ur saying about the __pin..if anything they should be same because iic signals help configure chrontel dac and the other data and sync signals are also going into the dac only

Hope this helps

 

Regards,
Shashwat.

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10,423 Views
Registered: ‎12-30-2008

Re: TFT-Display with EDK xps_tft IP-Core?

Hi,

       I ran the color bar example on an ML507 and I got half a screen with the color bars. How can I create a 2MB framebuffer to draw the color bars for the whole screen ?

 

I'm trying to learn how to use the XPS TFT IP Core, and my aim is to read data from the VGA input, copy it to a framebuffer and then display it using the DVI output. 

 

Best regards,

 

Elvis Dowson

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10,391 Views
Registered: ‎12-30-2008

Re: TFT-Display with EDK xps_tft IP-Core?

Hi,

        Here is a pdf document that provides step by step instructions on how to use the PowerPC440 processor and the XPS TFT v2.01.a IP Core, using DDR2 RAM as a framebuffer device.

 

Best regards,

 

Elvis Dowson

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Visitor
Visitor
9,934 Views
Registered: ‎09-06-2010

Re: TFT-Display with EDK xps_tft IP-Core?

Chontel Chip has a reset pin!!

it was a wonderful peice of advice!! Thanks a lot, you saved me !!!!

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Visitor
Visitor
9,545 Views
Registered: ‎05-04-2008

Re: TFT-Display with EDK xps_tft IP-Core?

I meet the same problem with wuddl.  The image seems display from the middle of the screen, and repeat once again. How to deal with it? Just like wuddl said "It looks like as the upper an the lower video  memory MB is the same, because if i only draw 1 pixel  there are again 2 . "

 

BTW, I have a Virtex 5 ML505 Board with included Chrontel CH7301C Controller Chip for the DVI Interface. I'm building a system with EDK with a Microblaze and 2MB of SRAM with the Base Ssystem Builder. 

 

Thanks for response. 

 

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Visitor
Visitor
9,464 Views
Registered: ‎11-29-2010

TFT-Display with EDK xps_tft IP-Core?

Hay, This is Firoz,

I am doing a project in which I implementing Image/ Video Processing in Matlab, converting that into VHDL and implementing it using EDK(10.1sp2) and ML506 Board.

I need your help for this.

 

1. Are you able to conplete your project (getting a input from VGA input and displaying through TFT controller.)  If you had done it can you please send the full EDK folder using ZIP.

 

2. Is it possible to get the Video from CF card and show it of monitor ( do you have any example files for doing  this)

 

Advancely Thanking you very much Brother.

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Visitor
Visitor
9,462 Views
Registered: ‎11-29-2010

Re: TFT-Display with EDK xps_tft IP-Core?

Hay, This is Firoz,

I am doing a project in which I implementing Image/ Video Processing in Matlab, converting that into VHDL and implementing it using EDK(10.1sp2) and ML506 Board.

I need your help for this.



1. Are you able to conplete your project (getting a input from VGA input and displaying through TFT controller.) If you had done it can you please send the full EDK folder using ZIP.



2. Is it possible to get the Video from CF card and show it of monitor ( do you have any example files for doing this)



Thanking you very much
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Visitor
Visitor
9,462 Views
Registered: ‎11-29-2010

Re: TFT-Display with EDK xps_tft IP-Core?

Hay, This is Firoz,

I am doing a project in which I implementing Image/ Video Processing in Matlab, converting that into VHDL and implementing it using EDK(10.1sp2) and ML506 Board.

I need your help for this.

 

1. getting a input from VGA input and displaying through TFT controller.  If you have any projcts then please send the full EDK.

 

2. Is it possible to get the Video from CF card and show it of monitor ( do you have any example files for doing  this)

 

Thanking you very much

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Visitor
Visitor
9,462 Views
Registered: ‎11-29-2010

Re: TFT-Display with EDK xps_tft IP-Core?

Hay, This is Firoz,

I am doing a project in which I implementing Image/ Video Processing in Matlab, converting that into VHDL and implementing it using EDK(10.1sp2) and ML506 Board.

I need your help for this.

 

1. getting a input from VGA input and displaying through TFT controller.  If you have any projcts then please send the full EDK.

 

2. Is it possible to get the Video from CF card and show it of monitor ( do you have any example files for doing  this)

 

Thanking you very much

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Visitor
Visitor
9,031 Views
Registered: ‎10-12-2010

Re: TFT-Display with EDK xps_tft IP-Core?

Hello

I have to show an image using xps_tft via DVI port but it shows a very distorsioned image . The exemple with colorbars runs perfectly. The image is read from the flash card and i try to show it with

for(row=0;row<480;row++)
for(col=0;col<640;col++)
{
XTft_SetPixel (Tft,row,col,imagebuffer[k]) ;
k++;
}

Please help me resolve this.

Thanks

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Instructor
Instructor
9,023 Views
Registered: ‎07-21-2009

Re: TFT-Display with EDK xps_tft IP-Core?

As I mentioned in your duplicate post:

 

1.  Start a new thread if you want to introduce a new discussion topic.

 

2.  The problem description "distorted image" is too vague.  If you want useful answers, please provide useful amount of detail information.  Im my personal experience, only wives (well, one in particular) and daughters -- not design engineers -- expect mind-reading to work well.

 

To which I add a 3rd suggestion:

 

3.  No duplicate posts/threads please.  One thread is enough.  It is difficult enough maintaining a coherent discussion in one thread, much less two (or more).

 

-- Bob Elkind

SIGNATURE:
README for newbies is here: http://forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369

Summary:
1. Read the manual or user guide. Have you read the manual? Can you find the manual?
2. Search the forums (and search the web) for similar topics.
3. Do not post the same question on multiple forums.
4. Do not post a new topic or question on someone else's thread, start a new thread!
5. Students: Copying code is not the same as learning to design.
6 "It does not work" is not a question which can be answered. Provide useful details (with webpage, datasheet links, please).
7. You are not charged extra fees for comments in your code.
8. I am not paid for forum posts. If I write a good post, then I have been good for nothing.
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Visitor
Visitor
2,921 Views
Registered: ‎11-21-2011

Re: TFT-Display with EDK xps_tft IP-Core?

J'ai créé  l'  IP  TFT  en utilisant  ce fichier


 puis  j'ai  obtenu  l'erreur  que

d'erreur : EDK: 3900 - émis par la procédure TCL »:: sw_xilfatfs_v1_00_a:: xilfatfs_drc" 
ligne 15 
xilfatfs () - module de Sysace HW pas présent ou n'est pas accessible à partir de ce 
processeur. FATfs ne peut pas être utilisé sans ce module d'erreur : EDK: 3900 - émis par la procédure TCL »:: sw_lwip130_v3_00_a:: lwip_drc" ligne 12 lwip130 () - Pas de noyaux MAC Ethernet sont adressables à partir du processeur ppc440_0. lwIP nécessite atleast un EMAC (xps_ethernetlite | xps_ll_temac | axi_ethernet | axi_ethernetlite) de base avec ses broches d'interruption connecté à . le contrôleur d'interruption d'erreur .: EDK: 3414 - Erreur (s) tout en DRC courir make: *** [ppc440_0/lib/libxil.a] Erreur 2







Je n'ai  pas compris comment je peux résoudre ce problème

s'il vous plaît aider


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Visitor
Visitor
2,412 Views
Registered: ‎05-03-2014

Re: TFT-Display with EDK xps_tft IP-Core?

hello. . m trying to run uliuni's code. bt m getting an error message " xps_mch_emc_v2_00_a" was not found.. . . whats happenning ????

:P 

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