09-03-2020 05:13 PM
UG1138, in Chapter 2 (Hardware Handoff) has the following warning:
What is the criteria for independent or dependent block designs? I assume independent blocks would have self-contained address maps, where as dependent blocks share the AXI address map (i.e. a processor in one BD is connected to an AXI periperal in another BD.
Is this assumption correct?
09-23-2020 10:03 AM
The meaning here is that with multiple independent Block Designs will only have visibility into their own BD. For example, any slave segments contained within the BD will be visible from the exported hardware, but not segments that are outside of the BD (or in a connected BD). I would suggest trying Block Design hierarchies.