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Registered: ‎08-18-2009

Unable to write/read to SW accessible registers for custom IP


I have been unsuccessful in writing to and reading from software accessible registers for my custom VHDL IP.  The IP was created by the Create/Import custom IP wizard.  Whenever I try to write a 32 bit value to a register and read it back with the automatically generated functions, the return is a 0 no matter what I write.  Here is an example of C code calls:

status = PGPRGM_mReadSlaveReg0(XPAR_PGPRGM_1_BASEADDR, 0);  ----where status is Xuint32

xil_printf("The status is: %8.8X \r", status);


I have read that many people have had trouble because they are applying an offset with this call and this call is specific to the register and already has the offset built in.  I have tried this call both with and without the offset and I have also tried the following below.


PGPRGM_mWriteReg(XPAR_PGPRGM_1_BASEADDR, PGPRGM_SLV_REG0_OFFSET, 0xFFFFFFFF);  ---- 0 happens to be the appropriate offset in this case

status = PGPRGM_mReadReg(XPAR_PGPRGM_1_BASEADDR, PGPRGM_SLV_REG0_OFFSET);  ----where status is Xuint32

xil_printf("The status is: %8.8X \r", status);


I have tried also tried what I believe the underlying function these are built upon found below:




xil_printf("The status is: %8.8X \r", status);


They accomplish the same thing. They all read back 0.  The code was generated for these register automatically but I can post it if necessary.  I don't see any other errors when building the C code or the drivers.  If anyone has the solution or knows something that I might be doing wrong I appreciate it.



3 Replies
Xilinx Employee
Xilinx Employee
Registered: ‎01-18-2008

Debugging issues like this is a lot easier with XMD. Assuming the base address is 0x10001000, you can do something like this:


XMD% mrd 0x10001000 5 - this will print out 5 words starting at the base address

XMD% mwr 0x10001000 0xdeadbeef - this will write 0xdeadbeef to that register


Using these simple memory read/write commands, you can quickly check if your peripheral is indeed working. If it is, then worry about your C code. If it isn't, then check if you've connected the plb bus, clock & reset connections correctly, or try using Chipscope PLB IBA. 

Registered: ‎08-18-2009

Thank you.  These commands are indeed helpful.  Even after I finish this problem I will now have a new tool.  After running the commands below:


mwr 0xC6400000 0xFFFFFFFF ------where 0xC6400000 is my base address

mrd 0xC6400000 1


I receive the all zeros I am accustomed to.  If I read your post correctly this points to my IP working incorrectly.   I assume this means my IP does not have the slv_reg's set up correctly.  This is puzzling as all the slv_reg's were pretty much setup up by the automated IP creator (create or import peripheral) and my custom VHDL code just accesses them as signals.  I am not very well versed with how the slv_reg connections are set up.  If there is a link or some example code of how VHDL should look for them, or significant connections I should look for I would appreciate it.  In the mean time I will try regenerating an IP using the the automated creator and adding my code to that to see if I get different results.

Message Edited by jdsloat on 04-02-2010 08:09 AM
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Registered: ‎07-09-2009



sounds like your on the right track, your Ip is not working,




program and burn way:

   try adding a constant register to the design, so you cna read back a set number, might prove the read works / not works.


proper way:

  do a simulation, and  / or use chipscope to monitor the bus.


 I'd recomend a simulaiotn no matter what, 


If your using 11.5 , I think the built in Isim Lite simulator now works in EDK, it never used to in 11.4 or below.

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