04-10-2014 09:35 AM
I'm trying to write to a register using SDK and then use that value to select a state in EDK
That input is a value to select what I want to do in EDK.
If it is only a one bit value I read it in this way in EDK:
s_wr_en<= slv_reg_write_sel(1) and Bus2IP_Data(31);
Now, I need 3 bit in order to cover the different states.
I was thinking of this, but it doesn't work.
s_select <= slv_reg_write_sel(4 to 6) and Bus2IP_Data(29 to 31)
If I do it like this, EDK will only read out 001 or 000... (I want to go from 000 to 111).
Anyone has a suggestion how to do it?
Thanks in advance
04-10-2014 02:20 PM
Without taking too close of a look, I think your second example is using three different address decodes but I expect you want three data bits at one address.
So it would be more like:
s_select(0 to 2) <= slv_reg_write_sel(4) and Bus2IP_Data(29 to 31);
So when slv_reg_write_sel bit 4 is active, all three data bits are clocked into the three bit s_select.
04-11-2014 12:54 AM
I have tried but I get the error: "Indexed name is not a std_logic_vector"
Also, can I assume that the registers are read all the time? Or is it only read when I change the value of the register?
04-11-2014 01:48 AM
(Is there a way to edit my post?)
The code that I use in SDK to write to the register is:
*ptr_wr_slv6=0x00000000; xil_printf("slv6:=0x%08X\n\r", *ptr_wr_slv6); //register I use as input xil_printf("slv7:=0x%08X\n\r", *ptr_wr_slv7); // should read out value of s_select xil_printf("Address where we want to write 0x%08X \n\r",*ptr_wr_slv5); writeLoc = *ptr_wr_slv5; //register where address is stored *ptr_wr_slv1 = 0x00000001; // register used to enable write mod xil_printf("enable: 0x%08X\n\r", *ptr_wr_slv1); xil_printf("Address : 0x%08X value: 0x%08X \n\r",writeLoc, *writeLoc);//writeLoc is used to read out in software to check if written correct
The code in EDK is:
SLAVE_REG_WRITE_PROC : process( Bus2IP_Clk ) is begin if Bus2IP_Clk'event and Bus2IP_Clk = '1' then if Bus2IP_Reset = '1' then slv_reg0 <= (others => '0'); slv_reg1 <= (others => '0'); -- slv_reg2 <= (others => '0'); -- slv_reg3 <= (others => '0'); -- slv_reg4 <= (others => '0'); -- slv_reg5 <= (others => '0'); slv_reg6 <= (others => '0'); -- slv_reg7 <= (others => '0'); else case slv_reg_write_sel is when "10000000" =>slv_reg0 <= Bus2IP_Data; --reset when "01000000" =>slv_reg1 <= Bus2IP_Data; --enable -- when "00100000" =>slv_reg2 <= Bus2IP_Data; --write data -- when "00010000" =>slv_reg3 <= Bus2IP_Data; --done -- when "00001000" =>slv_reg4 <= Bus2IP_Data; --addrAck -- when "00000100" =>slv_reg5 <= Bus2IP_Data; --addr when "00000010" =>slv_reg6 <= Bus2IP_Data; --select what to write -- when "00000001" =>slv_reg7 <= Bus2IP_Data; when others => null; end case; end if; end if; end process SLAVE_REG_WRITE_PROC; process(clk) begin if (clk' event and clk='1') then s_wr_en<= slv_reg_write_sel(1) and Bus2IP_Data(31); --enable read -> in software 0x00000001 to enable it s_select <= (Bus2IP_Data(29 to 30))&(slv_reg_write_sel(6) and Bus2IP_Data(31)); --select what to write in -- s_select (2 downto 0) <= slv_reg_write_sel(6) and Bus2IP_Data(29 to 31); --select what to write in WrFIFO_Data<=s_dataIn; s_addrAck <= AddrAck; addr <= s_addr; Done <= s_done; slv_reg2 <= s_dataIn; --data that is written slv_reg3 <= "0000000000000000000000000000000"& s_done;--done slv_reg4 <= "0000000000000000000000000000000" & s_AddrAck; slv_reg5 <= s_addr; slv_reg7 <= "00000000000000000000000000000" & s_select; end if; end process;
now the problem is that the data in register7 stays the same. (always 0x00000000)