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Participant lagrossi
Participant
6,404 Views
Registered: ‎06-18-2009

V5 PPC440 JTAG

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Hi All,

I have a virtex 5 FX with a PPC core that i'm trying to connect to via JTAG as part of a board test. Within the EDK I have directly connect the TDI, TDO, TCK and TMS signals to an IO pin and supplied the PPC with the required clocks. How do I test that JTAG connection works? After some reseach I realised that a BSDL file that tell JTAG software how to interact with the PPC is reqiured, does xilinx provide this or maybe IBM.  After I have this, I would then need to create a set of test vectors to run and verify what something happens to confirm that JTAG is working. Is there something out there that already exists ? or just point me in the right direction. 

 

Cheers 

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Xilinx Employee
Xilinx Employee
7,673 Views
Registered: ‎08-07-2007

Re: V5 PPC440 JTAG

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Hi,

 

If PPC is not a concern, you can still do whatever you usually do with iMPACT, either to configure the FPGA or perform any JTAG debug operations. It doesn't care whether the PPC is connected to the FPAG JTAG chain or user IOs.

 

As for debugging PPC when the JTAG ports are connected user IOs, you can connected a Xilinx JTAG cable to the user IOs and connect to the processor with XMD, if you don't have third-party debugging tools.

 

-XF

 

 

 

 

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Explorer
Explorer
6,391 Views
Registered: ‎08-12-2007

Re: V5 PPC440 JTAG

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A little bit confused:

- Whether the "TDI, TDO, TCK and TMS signals to an IO pin" you mentioned means that you have connected Xilinx's JTAG cable to the FPGA's JTAG port?

 

If so, you can use iMPACT tool from ISE to connect the JTAG connection, do cable detection, FPGA Device ID readback, etc.

 

iMPACT can test the JTAG loop. 

 

If you'd like to test the PPC functions, why not use EDK BSB Wizard to build a simple project and test it on board?

You can only include the PPC, XPS_BRAM, JTAG Control and UartLite.

BSB Wizard usage can be found at CTT doc.

http://www.xilinx.com/support/documentation/sw_manuals/edk10_ctt.pdf

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Participant lagrossi
Participant
6,385 Views
Registered: ‎06-18-2009

Re: V5 PPC440 JTAG

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Thanks Ricky

 

Those jtag signals from the PPC are directly connected to the external JTAG header  separate to the FPGA JTAG header. I then would like to perform a quick 

test verifying the pins are correctly connected. So for the first part of your response, I don't have the PPC connected of the FPGA JTAG chain ( such as to create an TAGPPC440 embedded block and connect the PPC JTAG signals to that). ANd the second part, i'm just trying to test the signals from the FPGA to the external board pins and not really concerned about testing the PPC itself using the JTAG ( well not yet anyways)

 

After reading the PPC44 core user manual it seems you would connect directly to the PPC using a "proper" JTAG emulator for debugging such as RISCWatch product from IBM which it recommends. Could I somehow use impact and the xilinx platform cable to physically connect to it and retrieve something..


Thks
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Xilinx Employee
Xilinx Employee
7,674 Views
Registered: ‎08-07-2007

Re: V5 PPC440 JTAG

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Hi,

 

If PPC is not a concern, you can still do whatever you usually do with iMPACT, either to configure the FPGA or perform any JTAG debug operations. It doesn't care whether the PPC is connected to the FPAG JTAG chain or user IOs.

 

As for debugging PPC when the JTAG ports are connected user IOs, you can connected a Xilinx JTAG cable to the user IOs and connect to the processor with XMD, if you don't have third-party debugging tools.

 

-XF

 

 

 

 

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Participant lagrossi
Participant
6,297 Views
Registered: ‎06-18-2009

Re: V5 PPC440 JTAG

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Thanks for that ,, for further reading ppl can check out the Embedded System Tools Reference Manual UG111, EDK 11.2 pg 167

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