03-16-2021 03:25 PM
Hi. I am trying to use gdb to connect to my Cortex-R5 target on a Xilinx Zynq Ultrascale+ XCZU2CG.
See the below errors. I have the logs from gdb client and hw_server below. This is being run from a Windows 10 install. What am I missing? Do I need to specify which core? I also tried with Linux client and same issue.
C:\Xilinx\Vitis\2020.2\gnu\armr5\nt\gcc-arm-none-eabi\bin\armr5-none-eabi-gdb.exe: warning: Couldn't determine a path for the index cache directory.
GNU gdb (GNU Toolchain for the A-profile Architecture 9.2-2020.02 (arm-9.10)) 184.108.40.20690709-git
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This GDB was configured as "--host=i686-w64-mingw32 --target=arm-none-eabi".
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Reading symbols from ..\..\fsbl.elf...
(gdb) target remote localhost:3000
Remote debugging using localhost:3000
Remote replied unexpectedly to 'vMustReplyEmpty': PacketSize=4000;QStartNoAckMode+;qXfer:features:read+;qXfer:exec-file:read+;multiprocess+;swbreak+;hwbreak+
xsct% hw_server -L-
WARNING: [Common 17-259] Unknown Tcl command 'hw_server -L-' sending command to the OS shell for execution. It is recommended to use 'exec' to send the command to the OS shell.
****** Xilinx hw_server v2020.2
**** Build date : Nov 18 2020 at 10:01:48
** Copyright 1986-2020 Xilinx, Inc. All Rights Reserved.
INFO: hw_server application started
INFO: Use Ctrl-C to exit hw_server application
INFO: To connect to this hw_server instance use url: TCP:ONW-NHILDERM-01:3121
TCF 01:36:53.761: jtagpoll: open port Digilent/251633005BA0A
TCF 01:36:53.805: Detected Zynq UltraScale+: family 56, platform 0 V0, RTL V81, PS V3
TCF 01:36:53.992: Cannot get process ISA: Cannot read 'sctlr'. Cannot read register if not stopped. Execution context is running
TCF 01:36:53.996: Cannot get process ISA: Cannot read 'sctlr'. Cannot read register if not stopped. Execution context is running
TCF 01:36:53.999: Cannot get process ISA: APU L2 cache is held in reset
TCF 01:36:54.000: Cannot get process ISA: APU L2 cache is held in reset
TCF 01:36:59.498: GDB Server connection closed: An existing connection was forcibly closed by the remote host
05-06-2021 02:08 PM
Before GDB can be used a few conditions must first be met:
One easy way to accomplish all this is to borrow the init sequence from the Vitis IDE. For example, in the IDE create a hello-world project for the processor of interest then debug with GDB (i.e. Launch on Hardware - Single Application Debug - GDB). Once the debug session is launched an "XSDB Script" can be found in the Vitis Log tab. These commands can be copied to a new *.tcl file and used to prepare the device prior to GDB debug. Below is a screenshot highlighting these commands in an example project.
Assuming these commands were saved to a "debug_script.tcl" file, the script could be run and an active TCF session left open as follows:
$ xsct -interactive debug_script.tcl
Then separately start gdb and connect. For example:
(gdb) tar ext localhost:3000
The (GDB) command above is the short-hand version of: target extended-remote localhost:3000
Availability of processors can also be confirmed from GDB with the monitor command. For example:
(gdb) mon ps
1: Cortex-R5 #0 (Suspended)
Note that the remote gdbserver connection is actually hosted by hw_server (TCF agent). In the example above port 3000 is the default for Aarch32 connections. The full list of default ports can be found in hw_server built-in documentation. For example:
$ hw_server -help
Usage: agent [OPTION]...
Start Target Communication Framework agent.
-d run in daemon mode (output is sent to system logger)
-p<port> base port number for Xilinx GDB server
default is 3000, -p0 disables the ports
the server opens one port per target architecture:
3000: ARM; 3001: ARM64; 3002: MicroBlaze; 3003: MicroBlaze64