cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 
joe306
Scholar
Scholar
547 Views
Registered: ‎12-07-2018

Vitis 2020 Programming Boot Flash

Jump to solution

Hello, I've been using Vitis 2019 and have been able to program the boot memory  which is QSPI and able to get the PL and PS to boot up problem. All good! Now I have updated to Vitis 2020.2 and after I program the device I only get the PL side working the the code running on ARM Core 0 does not run. All I have on the PL side is LEDs blinking and the PS ARM 0 should be blinking LEDs but they don't. I don't know why the PS side is not running I know things are a little different in Vitis2020 but I create the boot image the same as before. I am not using an OS, this is bare-metal. There must be something that I am doing that is different than what I did in 2019.

I'll try uploading my design for anyone willing to help me get the PS working.

Thank you

 

0 Kudos
1 Solution

Accepted Solutions
joe306
Scholar
Scholar
528 Views
Registered: ‎12-07-2018

I wanted to say that when the Flash Programming Tool finished it finished successfully. I also I had no problem running the code in the Debug mode.

Here is the boot image file:

//arch = zynqmp; split = false; format = BIN
the_ROM_image:
{
[bootloader, destination_cpu = a53-0]D:/Projects/CLC_FPGA_BRD_Vitis2020/FPGA_BRD/Vitis_Workspace/FPGA_plat/export/FPGA_plat/sw/FPGA_plat/boot/fsbl.elf
[destination_device = pl]D:\Projects\CLC_FPGA_BRD_Vitis2020\FPGA_BRD\Vitis_Workspace\MyHello_World_LEDS\_ide\bitstream\Top_Block_wrapper_U.bit
[destination_cpu = a53-0]D:/Projects/CLC_FPGA_BRD_Vitis2020/FPGA_BRD/Vitis_Workspace/MyHello_World_LEDS/Debug/MyHello_World_LEDS.elf
}

 

 

 

View solution in original post

0 Kudos
3 Replies
joe306
Scholar
Scholar
539 Views
Registered: ‎12-07-2018

Here is the view of the Vitis Flow:

Vitis_View.jpg

0 Kudos
joe306
Scholar
Scholar
535 Views
Registered: ‎12-07-2018

The FPGA_plat directory is too large to upload. What can I take a screen shot that may help find?

 

 

0 Kudos
joe306
Scholar
Scholar
529 Views
Registered: ‎12-07-2018

I wanted to say that when the Flash Programming Tool finished it finished successfully. I also I had no problem running the code in the Debug mode.

Here is the boot image file:

//arch = zynqmp; split = false; format = BIN
the_ROM_image:
{
[bootloader, destination_cpu = a53-0]D:/Projects/CLC_FPGA_BRD_Vitis2020/FPGA_BRD/Vitis_Workspace/FPGA_plat/export/FPGA_plat/sw/FPGA_plat/boot/fsbl.elf
[destination_device = pl]D:\Projects\CLC_FPGA_BRD_Vitis2020\FPGA_BRD\Vitis_Workspace\MyHello_World_LEDS\_ide\bitstream\Top_Block_wrapper_U.bit
[destination_cpu = a53-0]D:/Projects/CLC_FPGA_BRD_Vitis2020/FPGA_BRD/Vitis_Workspace/MyHello_World_LEDS/Debug/MyHello_World_LEDS.elf
}

 

 

 

View solution in original post

0 Kudos