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Scholar
Scholar
528 Views
Registered: ‎06-20-2017

Vitis command line options / addition to make

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How do I add a command line option when make is called?

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Explorer
Explorer
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Registered: ‎10-04-2017

  On way, which I'm currently doing, is after generating a BSP apply a set of patches.  I use a shell script to run some tcl scripts and manged the patching.   

  I since saw this:

https://www.xilinx.com/html_docs/xilinx2020_1/vitis_doc/modifyingdomainsources.html

I haven't got it fully working yet but it seems a bit cleaner than patching.  You can create a mirror of a driver, add changes and then include these new repos in the project.  They have a higher priority than the "generated" one and you can have your build use the modified libs.

 

jeff

 

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Voyager
Voyager
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Registered: ‎05-25-2016

I have this same problem.  

Xilinx Employee
Xilinx Employee
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Registered: ‎08-13-2007

I've seen the ability to add custom tcl.pre to the stages during the implementation flow with the --xp vivado_prop switch, e.g.

https://forums.xilinx.com/t5/Alveo-Accelerator-Cards/How-to-use-vivado-prop/m-p/1089904

https://forums.xilinx.com/t5/Vitis-Acceleration-SDAccel-SDSoC/Generating-SLR-Utilization-Report-Using-Command-line-Flow/m-p/1098671

Would that work for you?

Cheers,

bt

Scholar
Scholar
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Registered: ‎06-20-2017

Thanks @barriet  for the attention.    But those links were for synthesis/implementation.  I'm talking pure software here with regard to make.

Let me clarify.  During the software build, I'd like to increase the number of jobs make uses (make -jobs or -J or something like that). 

When a platform is built, the Makefile for the domain is not being generated with the proper dependencies, and the entire domain or platform is rebuilt regardless of dependencies.   Running multiple jobs may help improve the compile time, generating a proper Makefile in light of the intent of the make command would save even more time.   The command line option to make may be a quick and simple way to mitigate the pain the makefile configured to recompile everything.

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Xilinx Employee
Xilinx Employee
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Registered: ‎08-13-2007

Mike,

I'm sorry I misunderstood what you were looking for here.

I'll admit I'm not the expert on that.

Normally Vitis uses the managed makefile flow: https://www.xilinx.com/html_docs/xilinx2020_1/vitis_doc/workingwithprojects.html#hna1565072993720

but it looks like you can use your own instead: https://www.xilinx.com/html_docs/xilinx2020_1/vitis_doc/ttg1584541172333.html

presumably with a previous auto-generated/managed one as baseline and then your modifications desired on top of that.

Maybe not as clean as just adding options like -j here, but perhaps a workaround for now.

Cheers,

bt

== edit. fixed second link

Voyager
Voyager
377 Views
Registered: ‎05-25-2016

Is there a document that explains how to add things to an automatically managed make file?

Explorer
Explorer
324 Views
Registered: ‎10-04-2017

  On way, which I'm currently doing, is after generating a BSP apply a set of patches.  I use a shell script to run some tcl scripts and manged the patching.   

  I since saw this:

https://www.xilinx.com/html_docs/xilinx2020_1/vitis_doc/modifyingdomainsources.html

I haven't got it fully working yet but it seems a bit cleaner than patching.  You can create a mirror of a driver, add changes and then include these new repos in the project.  They have a higher priority than the "generated" one and you can have your build use the modified libs.

 

jeff

 

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