09-20-2012 12:39 AM
I'm trying to send data to a register of a custom slave, by using a software accesible register.
I connected the slave to a AXI lite bus and the baseaddress is AXI_lite_slave_BASEADDR.
I'm trying to send the following data;
But on both command I've got the same problem.
The data gets received by the slave and it does what I want.
But the XIo_Out32 and Xil_Out32 function don't get out of the function, so it won't return
and the program freezes.
If I'm trying to send data to other addresses which are not in use,
it got sent correctly and the functions return.
How to fix this?
Thanks in advance,
Floris van Drunen
09-20-2012 02:54 AM
09-20-2012 03:32 AM
"XIo_Out32" (in former "xio.h") is discontinued and has been mapped to "Xil_Out32" (in "xil_io.h"), take a look here: http://www.xilinx.com/support/documentation/sw_manuals/xilinx14_2/oslib_rm.pdf
Does your custom slave conform to the AXI Specs? It might be that a missing response is causing the function to hang. Is the address of your custom Slave mapped? I suggest you try the same thing with a CIP-created Slave - if it works, you'll need to verify your Slave's functionality.
09-20-2012 04:34 AM
09-20-2012 04:45 AM
05-01-2013 03:10 AM
I'm seeing the same problem as yours and I've got "segmentation fault" error when calling Xil_Out32 and Xil_In32.
Could you please send me the instruction how to debug and fix this issue?
05-01-2013 09:56 AM
How are you connecting your custom IP, do you have a state machine where you manage the AXI signals in your IP??, or what do you do with the AXI signals that you receive from the bus??
07-09-2014 06:43 AM
I have the exact same problem. The problem is accessing PL side from PS. I was working on Adam's tutorials and I realized that I can't communicate with PL side: For example driving XADC or creating a peripheral and accessing via AXI-L port.
When I debug the code and step into Xil_Out32 function it crashes and the error is:
Error while handling inferior event
Remote failure reply : E01
Still couldn't find a solution looking for a help. Thanks in advance,
10-06-2015 12:57 AM
I have exactly your same problem. Did you solve it ?
In my situation, I have an AMP with Linux running on CPU0 and bare metal on CPU1.
I think it is a problem of initalization related in some way to ps_init.tcl
I still don't understand, but I am sure it is related to that...
07-18-2019 02:00 PM
Can you share your AXI core with us at all?
I found some bugs in Xilinx's AXI demo cores this past year that would cause the bus to hang, and I'd be curious to see of those same bugs were in your core(s).
07-19-2019 05:05 AM
I am using an AXI demo core (DAC source from RFSOC), so this may very well be it! I'll look into your link. Thanks! I'll update if it is the solution
07-19-2019 05:44 AM
The AXI-lite demo core should be easy to fix. Rather than fix the AXI demo core, though, I just rewrote it. While one problem with that core appeared easy to fix, there was another problem or two that wasn't quite so clear to me.
07-19-2019 05:49 AM - edited 07-19-2019 05:49 AM
I'm starting to think that my issue is actually related to my PS DDR4 configuration. For some reason, a Preset doesn't seem to be available in the Zynq IP configuration tool for the Micron MTA4ATF51264HZ-2G6E1 SODIMM that is installed on the ZCU111... Guess I need to figure out how to configure that properly, though I'm having difficulty finding out how. If I'm still having issues with the interface once I figure this out, I'll replace the AXI-lite core. Thanks!
07-19-2019 12:47 PM
I was correct about my DDR configuration being off. Embarrassingly, all I needed to do was run the "Block Automation Tool" to set up the correct presets.
I didn't realize this because they don't include any examples with the RFSOC on setting up the processor, but it tuurns out that the process is identical to the MPSOC