01-24-2017 09:21 AM
I am migrating my microblaze project from vvd 2015.4 to 2016.4.
I have a 160k imem which is made of a 128k and a 32k BRAM generator. The system works well with vvd 2015.4.
When I migrate my project to 2016.4, I get critical warning from "updatemem":
Command: update_mem -meminfo hisoka_wrapper.mmi -data /home/kurapica/zynq/hisoka/hisoka.sdk/microblaze/Debug/microblaze.elf -proc hisoka_i/mb/microblaze_0 -bit hisoka_wrapper.bit -out hisoka_wrapper_updated.bit -debug CRITICAL WARNING: [Updatemem 57-172] The elf file code segment 0 with a defined address range of [0x00000000:0x00000027] does not match any existing address spaces as defined in the mmi file. Check the elf file and the mmi file for consistency. ERROR: [Updatemem 57-153] Failed to update the BRAM INIT strings for /home/kurapica/zynq/hisoka/hisoka.sdk/microblaze/Debug/microblaze.elf and hisoka_wrapper.mmi. 0 Infos, 0 Warnings, 1 Critical Warnings and 1 Errors encountered. update_mem failed ERROR: [Common 17-39] 'update_mem' failed due to earlier errors.
I compared BMM and MMI file generated from 2015.4 and 2016.4, and I found there's error in BMM and MMI files generated by vvd 2016.4:
1: MMI file generated by vvd 2016.4 only have 1 address segment and it only contains 128k memory. So that's why updatemem util failed. The 2015.4 version have correct 2 address segments.
2: BMM file generated by vvd 2016.4 have correct BRAM information, but the imem segment don't have processor information. The dmem segment have correct processor information.
I've attached the 2 files from 2 versions of vvd below. Please anyone who met this file or someone from Xilinx can help with my problem. Thanks.
01-24-2017 10:09 AM
Thanks for your quick reply.
But my problem is no populating bram without processor.
My system has an microblaze CPU, and it works well with vvd 2015.4. When I updated to 2016.4, I get wrong BMM and MMI files and these files stopped updatemem util working. I want to know how to solve this problem.
Should I hand write a MMI file for updatemem? and should I update my hand-writing MMI file after each placement? That's so inefficient.
01-25-2017 05:04 AM
The issue here (at least my guess). is that you have two memory ranges. If you export to SDK, the linker will select one of them.
So, you need to have these concat, and merge both sections in the linker. see the AR here:
You will need to do this in the MMI file too, as the MMI will see two separate regions that you will need to merge in the one space
02-14-2017 12:19 AM
the problem is that when microblaze has two bram slaves for ILMB(please see the picture below), after vivado finish writing bitstream, the bmm/mmi file generated by vivado seems wrong.
ILMB section in the bmm/mmi file has no processor, this cause that we can't boot microlaze.
If there is only one ILMB slave, the bmm/mmi file is correct.
So how to solve the problem when microblaze has two bram slaves for ILMB?
11-07-2018 09:36 AM
I had the same error, after adding a MIG in the design. The root-cause was that the linker wanted to fill the .text into the DRAM area. The solution was in this link (as was suggested before.) I had to edit the linker script to not to use the DRAM area to store the program code.