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Visitor kolobok1386
Visitor
7,735 Views
Registered: ‎08-23-2011

XPS Timer, system ticks

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Hi all, I work on eCos port for Microblaze. For generating eCos system ticks I use XPS timer. I configure TCSR register (tmr->control)

 

#define TIMER_ENABLE_ALL    0x400 /* ENALL */
#define TIMER_PWM           0x200 /* PWMA0 */
#define TIMER_INTERRUPT     0x100 /* T0INT */
#define TIMER_ENABLE        0x080 /* ENT0 */
#define TIMER_ENABLE_INTR   0x040 /* ENIT0 */
#define TIMER_RESET         0x020 /* LOAD0 */
#define TIMER_RELOAD        0x010 /* ARHT0 */
#define TIMER_EXT_CAPTURE   0x008 /* CAPT0 */
#define TIMER_EXT_COMPARE   0x004 /* GENT0 */
#define TIMER_DOWN_COUNT    0x002 /* UDT0 */
#define TIMER_CAPTURE_MODE  0x001 /* MDT0 */

 

 

StatusReg = tmr->control; /* load status reg */
if (StatusReg & TIMER_ENABLE)
{
   StatusReg &= ~(TIMER_ENABLE); /* Is started and running - stop t
   tmr->control = StatusReg;
}
tmr->loadreg = 830000;//period; /* set the Load register to period */
tmr->control = TIMER_INTERRUPT | TIMER_RESET; /* reset the timer and the

/* set the control/status register to complete initialization by clearing the reset bit.
 * which was just set and set enable bit */
#ifdef CYGHWR_HAL_RTC_USE_AUTO_RESET
/* using reload mode */.
tmr->control = TIMER_ENABLE | TIMER_ENABLE_INTR | TIMER_RELOAD | TIMER_DOWN_COUNT | TIMER_EXT_COMPARE;
#else
tmr->control = TIMER_ENABLE | TIMER_ENABLE_INTR | TIMER_RELOAD | TIMER_DOWN_COUNT;
#endif

This code has to enable Timer0, enable interrupts for timer0, enable autoreload for timer0, and down count. Load reg has value 830000 (10 ms on 83 MHz frequency). Timer has to generate interrupts every 10 ms, but there are no interrupts. I connect it to Microblaze(I have no more interrupts). But I've tried to use Xilinx interrupt controller? there are no interrupts too. What's wrong???

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1 Solution

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Explorer
Explorer
9,014 Views
Registered: ‎08-14-2007

Re: XPS Timer, system ticks

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Hmmm.

have you checked the .pad file to make sure the interrupt pin is the one you think it is supposed to be on? I've had pins move around occasionally for reasons which only became clear much later on...


This is what I would try next:
* Set the reset value to something *much* bigger to give yourself a second or two of time
* reset the timer and the interrupt at the same time
* keep reading the registers, check that the timer is decrementing and the interrupt flag has gone low
* keep looking until the timer wraps, check that the interrupt has gone high.

Check with both chipscope and a oscilloscope.
Martin Thompson
martin.j.thompson@trw.com
http://www.conekt.co.uk/capabilities/electronic-hardware
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17 Replies
Explorer
Explorer
7,725 Views
Registered: ‎08-14-2007

Re: XPS Timer, system ticks

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Have you called microblaze_enable_interrupts()?

Martin Thompson
martin.j.thompson@trw.com
http://www.conekt.co.uk/capabilities/electronic-hardware
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Visitor kolobok1386
Visitor
7,720 Views
Registered: ‎08-23-2011

Re: XPS Timer, system ticks

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Yes, the value of MSR register is 0x00000002 (interrupt enable bit is 31-th)

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Explorer
Explorer
7,716 Views
Registered: ‎08-14-2007

Re: XPS Timer, system ticks

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Ok, it's not the easy answer then :)

Have you used chipscope to validate the interrupt signal is making it to the processor and is of the right format?
Martin Thompson
martin.j.thompson@trw.com
http://www.conekt.co.uk/capabilities/electronic-hardware
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Visitor kolobok1386
Visitor
7,711 Views
Registered: ‎08-23-2011

Re: XPS Timer, system ticks

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Ye, I use chipscope and I look on signal with oscillograph  and there are no interrupt from XPS_timer. I can't find a mistake....

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Explorer
Explorer
7,708 Views
Registered: ‎08-14-2007

Re: XPS Timer, system ticks

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Is the timer definately running? Can you read the count register with XMD and see it decrementing? Are the other registers set correctly (when viewed in "memory")? What does 'mrd [base address of timer] 16' look like (from XMD)?
Martin Thompson
martin.j.thompson@trw.com
http://www.conekt.co.uk/capabilities/electronic-hardware
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Visitor kolobok1386
Visitor
7,707 Views
Registered: ‎08-23-2011

Re: XPS Timer, system ticks

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Ye, I see that timer counts, it decremnts and auto reset to 'load register' value. TCSR is 0x000001D2

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Explorer
Explorer
7,694 Views
Registered: ‎08-14-2007

Re: XPS Timer, system ticks

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So the TCSR says you've had an interrupt... but chipscope doesn't show it at all?

 

can you post relevant bits of your MHS file?

Martin Thompson
martin.j.thompson@trw.com
http://www.conekt.co.uk/capabilities/electronic-hardware
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Visitor kolobok1386
Visitor
7,693 Views
Registered: ‎08-23-2011

Re: XPS Timer, system ticks

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# ##############################################################################
# Created by Base System Builder Wizard for Xilinx EDK 13.2 Build EDK_O.61xd
# Thu Oct 06 16:13:29 2011
# Target Board:  Xilinx Spartan-6 SP605 Evaluation Platform Rev C
# Family:    spartan6
# Device:    xc6slx45t
# Package:   fgg484
# Speed Grade:  -3
# Processor number: 1
# Processor 1: microblaze_0
# System clock frequency: 83.3
# Debug Interface: On-Chip HW Debug Module
# ##############################################################################
 PARAMETER VERSION = 2.1.0


 PORT fpga_0_MCB_DDR3_mcbx_dram_addr_pin = fpga_0_MCB_DDR3_mcbx_dram_addr_pin, DIR = O, VEC = [12:0]
 PORT fpga_0_MCB_DDR3_mcbx_dram_ba_pin = fpga_0_MCB_DDR3_mcbx_dram_ba_pin, DIR = O, VEC = [2:0]
 PORT fpga_0_MCB_DDR3_mcbx_dram_ras_n_pin = fpga_0_MCB_DDR3_mcbx_dram_ras_n_pin, DIR = O
 PORT fpga_0_MCB_DDR3_mcbx_dram_cas_n_pin = fpga_0_MCB_DDR3_mcbx_dram_cas_n_pin, DIR = O
 PORT fpga_0_MCB_DDR3_mcbx_dram_we_n_pin = fpga_0_MCB_DDR3_mcbx_dram_we_n_pin, DIR = O
 PORT fpga_0_MCB_DDR3_mcbx_dram_cke_pin = fpga_0_MCB_DDR3_mcbx_dram_cke_pin, DIR = O
 PORT fpga_0_MCB_DDR3_mcbx_dram_clk_pin = fpga_0_MCB_DDR3_mcbx_dram_clk_pin, DIR = O
 PORT fpga_0_MCB_DDR3_mcbx_dram_clk_n_pin = fpga_0_MCB_DDR3_mcbx_dram_clk_n_pin, DIR = O
 PORT fpga_0_MCB_DDR3_mcbx_dram_dq_pin = fpga_0_MCB_DDR3_mcbx_dram_dq_pin, DIR = IO, VEC = [15:0]
 PORT fpga_0_MCB_DDR3_mcbx_dram_dqs_pin = fpga_0_MCB_DDR3_mcbx_dram_dqs_pin, DIR = IO
 PORT fpga_0_MCB_DDR3_mcbx_dram_dqs_n_pin = fpga_0_MCB_DDR3_mcbx_dram_dqs_n_pin, DIR = IO
 PORT fpga_0_MCB_DDR3_mcbx_dram_udqs_pin = fpga_0_MCB_DDR3_mcbx_dram_udqs_pin, DIR = IO
 PORT fpga_0_MCB_DDR3_mcbx_dram_udqs_n_pin = fpga_0_MCB_DDR3_mcbx_dram_udqs_n_pin, DIR = IO
 PORT fpga_0_MCB_DDR3_mcbx_dram_udm_pin = fpga_0_MCB_DDR3_mcbx_dram_udm_pin, DIR = O
 PORT fpga_0_MCB_DDR3_mcbx_dram_ldm_pin = fpga_0_MCB_DDR3_mcbx_dram_ldm_pin, DIR = O
 PORT fpga_0_MCB_DDR3_mcbx_dram_odt_pin = fpga_0_MCB_DDR3_mcbx_dram_odt_pin, DIR = O
 PORT fpga_0_MCB_DDR3_mcbx_dram_ddr3_rst_pin = fpga_0_MCB_DDR3_mcbx_dram_ddr3_rst_pin, DIR = O
 PORT fpga_0_MCB_DDR3_rzq_pin = fpga_0_MCB_DDR3_rzq_pin, DIR = IO
 PORT fpga_0_MCB_DDR3_zio_pin = fpga_0_MCB_DDR3_zio_pin, DIR = IO
 PORT fpga_0_RS232_Uart_1_sin_pin = fpga_0_RS232_Uart_1_sin_pin, DIR = I
 PORT fpga_0_RS232_Uart_1_sout_pin = fpga_0_RS232_Uart_1_sout_pin, DIR = O
 PORT fpga_0_clk_1_sys_clk_p_pin = CLK_S, DIR = I, SIGIS = CLK, DIFFERENTIAL_POLARITY = P, CLK_FREQ = 200000000
 PORT fpga_0_clk_1_sys_clk_n_pin = CLK_S, DIR = I, SIGIS = CLK, DIFFERENTIAL_POLARITY = N, CLK_FREQ = 200000000
 PORT fpga_0_rst_1_sys_rst_pin = sys_rst_s, DIR = I, SIGIS = RST, RST_POLARITY = 1
 PORT microblaze_0_INTERRUPT_pin = Interrupt, DIR = O, SIGIS = INTERRUPT, SENSITIVITY = LEVEL_HIGH


BEGIN microblaze
 PARAMETER INSTANCE = microblaze_0
 PARAMETER C_USE_BARREL = 1
 PARAMETER C_DEBUG_ENABLED = 1
 PARAMETER C_ICACHE_BASEADDR = 0x48000000
 PARAMETER C_ICACHE_HIGHADDR = 0x4fffffff
 PARAMETER C_CACHE_BYTE_SIZE = 8192
 PARAMETER C_ICACHE_ALWAYS_USED = 1
 PARAMETER C_DCACHE_BASEADDR = 0x48000000
 PARAMETER C_DCACHE_HIGHADDR = 0x4fffffff
 PARAMETER C_DCACHE_BYTE_SIZE = 8192
 PARAMETER C_DCACHE_ALWAYS_USED = 1
 PARAMETER HW_VER = 8.20.a
 PARAMETER C_USE_ICACHE = 1
 PARAMETER C_USE_DCACHE = 1
 BUS_INTERFACE DLMB = dlmb
 BUS_INTERFACE ILMB = ilmb
 BUS_INTERFACE DPLB = mb_plb
 BUS_INTERFACE IPLB = mb_plb
 BUS_INTERFACE DXCL = microblaze_0_DXCL
 BUS_INTERFACE IXCL = microblaze_0_IXCL
 BUS_INTERFACE DEBUG = microblaze_0_mdm_bus
 PORT MB_RESET = mb_reset
 PORT INTERRUPT = Interrupt
END

BEGIN plb_v46
 PARAMETER INSTANCE = mb_plb
 PARAMETER HW_VER = 1.05.a
 PORT PLB_Clk = clk_83_3333MHzPLL0
 PORT SYS_Rst = sys_bus_reset
END

BEGIN lmb_v10
 PARAMETER INSTANCE = ilmb
 PARAMETER HW_VER = 2.00.b
 PORT LMB_Clk = clk_83_3333MHzPLL0
 PORT SYS_Rst = sys_bus_reset
END

BEGIN lmb_v10
 PARAMETER INSTANCE = dlmb
 PARAMETER HW_VER = 2.00.b
 PORT LMB_Clk = clk_83_3333MHzPLL0
 PORT SYS_Rst = sys_bus_reset
END

BEGIN lmb_bram_if_cntlr
 PARAMETER INSTANCE = dlmb_cntlr
 PARAMETER HW_VER = 3.00.b
 PARAMETER C_BASEADDR = 0x00000000
 PARAMETER C_HIGHADDR = 0x0000ffff
 BUS_INTERFACE SLMB = dlmb
 BUS_INTERFACE BRAM_PORT = dlmb_port
END

BEGIN lmb_bram_if_cntlr
 PARAMETER INSTANCE = ilmb_cntlr
 PARAMETER HW_VER = 3.00.b
 PARAMETER C_BASEADDR = 0x00000000
 PARAMETER C_HIGHADDR = 0x0000ffff
 BUS_INTERFACE SLMB = ilmb
 BUS_INTERFACE BRAM_PORT = ilmb_port
END

BEGIN bram_block
 PARAMETER INSTANCE = lmb_bram
 PARAMETER HW_VER = 1.00.a
 BUS_INTERFACE PORTA = ilmb_port
 BUS_INTERFACE PORTB = dlmb_port
END

BEGIN mpmc
 PARAMETER INSTANCE = MCB_DDR3
 PARAMETER C_NUM_PORTS = 1
 PARAMETER C_PORT_CONFIG = 1
 PARAMETER C_MCB_LOC = MEMC3
 PARAMETER C_MEM_CALIBRATION_SOFT_IP = TRUE
 PARAMETER C_MEM_SKIP_IN_TERM_CAL = 0
 PARAMETER C_MEM_SKIP_DYNAMIC_CAL = 0
 PARAMETER C_MCB_RZQ_LOC = K7
 PARAMETER C_MCB_ZIO_LOC = M7
 PARAMETER C_MEM_TYPE = DDR3
 PARAMETER C_MEM_PARTNO = MT41J64M16XX-187E
 PARAMETER C_MEM_ODT_TYPE = 1
 PARAMETER C_MEM_DATA_WIDTH = 16
 PARAMETER C_PIM0_BASETYPE = 1
 PARAMETER C_XCL0_B_IN_USE = 1
 PARAMETER HW_VER = 6.04.a
 PARAMETER C_MPMC_BASEADDR = 0x48000000
 PARAMETER C_MPMC_HIGHADDR = 0x4fffffff
 BUS_INTERFACE XCL0 = microblaze_0_IXCL
 BUS_INTERFACE XCL0_B = microblaze_0_DXCL
 PORT MPMC_Clk0 = clk_83_3333MHzPLL0
 PORT MPMC_Rst = sys_periph_reset
 PORT MPMC_Clk_Mem_2x = clk_666_6667MHzPLL0_nobuf
 PORT MPMC_Clk_Mem_2x_180 = clk_666_6667MHz180PLL0_nobuf
 PORT MPMC_PLL_Lock = Dcm_all_locked
 PORT mcbx_dram_addr = fpga_0_MCB_DDR3_mcbx_dram_addr_pin
 PORT mcbx_dram_ba = fpga_0_MCB_DDR3_mcbx_dram_ba_pin
 PORT mcbx_dram_ras_n = fpga_0_MCB_DDR3_mcbx_dram_ras_n_pin
 PORT mcbx_dram_cas_n = fpga_0_MCB_DDR3_mcbx_dram_cas_n_pin
 PORT mcbx_dram_we_n = fpga_0_MCB_DDR3_mcbx_dram_we_n_pin
 PORT mcbx_dram_cke = fpga_0_MCB_DDR3_mcbx_dram_cke_pin
 PORT mcbx_dram_clk = fpga_0_MCB_DDR3_mcbx_dram_clk_pin
 PORT mcbx_dram_clk_n = fpga_0_MCB_DDR3_mcbx_dram_clk_n_pin
 PORT mcbx_dram_dq = fpga_0_MCB_DDR3_mcbx_dram_dq_pin
 PORT mcbx_dram_dqs = fpga_0_MCB_DDR3_mcbx_dram_dqs_pin
 PORT mcbx_dram_dqs_n = fpga_0_MCB_DDR3_mcbx_dram_dqs_n_pin
 PORT mcbx_dram_udqs = fpga_0_MCB_DDR3_mcbx_dram_udqs_pin
 PORT mcbx_dram_udqs_n = fpga_0_MCB_DDR3_mcbx_dram_udqs_n_pin
 PORT mcbx_dram_udm = fpga_0_MCB_DDR3_mcbx_dram_udm_pin
 PORT mcbx_dram_ldm = fpga_0_MCB_DDR3_mcbx_dram_ldm_pin
 PORT mcbx_dram_odt = fpga_0_MCB_DDR3_mcbx_dram_odt_pin
 PORT mcbx_dram_ddr3_rst = fpga_0_MCB_DDR3_mcbx_dram_ddr3_rst_pin
 PORT rzq = fpga_0_MCB_DDR3_rzq_pin
 PORT zio = fpga_0_MCB_DDR3_zio_pin
END

BEGIN xps_uart16550
 PARAMETER INSTANCE = RS232_Uart_1
 PARAMETER C_IS_A_16550 = 1
 PARAMETER HW_VER = 3.00.a
 PARAMETER C_BASEADDR = 0x83e00000
 PARAMETER C_HIGHADDR = 0x83e0ffff
 BUS_INTERFACE SPLB = mb_plb
 PORT sin = fpga_0_RS232_Uart_1_sin_pin
 PORT sout = fpga_0_RS232_Uart_1_sout_pin
 PORT IP2INTC_Irpt = RS232_Uart_1_IP2INTC_Irpt
END

BEGIN clock_generator
 PARAMETER INSTANCE = clock_generator_0
 PARAMETER C_CLKIN_FREQ = 200000000
 PARAMETER C_CLKOUT0_FREQ = 666666666
 PARAMETER C_CLKOUT0_PHASE = 0
 PARAMETER C_CLKOUT0_GROUP = PLL0
 PARAMETER C_CLKOUT0_BUF = FALSE
 PARAMETER C_CLKOUT1_FREQ = 666666666
 PARAMETER C_CLKOUT1_PHASE = 180
 PARAMETER C_CLKOUT1_GROUP = PLL0
 PARAMETER C_CLKOUT1_BUF = FALSE
 PARAMETER C_CLKOUT2_FREQ = 83333333
 PARAMETER C_CLKOUT2_PHASE = 0
 PARAMETER C_CLKOUT2_GROUP = PLL0
 PARAMETER C_CLKOUT2_BUF = TRUE
 PARAMETER C_EXT_RESET_HIGH = 1
 PARAMETER HW_VER = 4.02.a
 PORT CLKIN = CLK_S
 PORT CLKOUT0 = clk_666_6667MHzPLL0_nobuf
 PORT CLKOUT1 = clk_666_6667MHz180PLL0_nobuf
 PORT CLKOUT2 = clk_83_3333MHzPLL0
 PORT RST = sys_rst_s
 PORT LOCKED = Dcm_all_locked
END

BEGIN mdm
 PARAMETER INSTANCE = mdm_0
 PARAMETER C_MB_DBG_PORTS = 1
 PARAMETER C_USE_UART = 1
 PARAMETER HW_VER = 2.00.b
 PARAMETER C_BASEADDR = 0x84400000
 PARAMETER C_HIGHADDR = 0x8440ffff
 BUS_INTERFACE SPLB = mb_plb
 BUS_INTERFACE MBDEBUG_0 = microblaze_0_mdm_bus
 PORT Debug_SYS_Rst = Debug_SYS_Rst
END

BEGIN proc_sys_reset
 PARAMETER INSTANCE = proc_sys_reset_0
 PARAMETER C_EXT_RESET_HIGH = 1
 PARAMETER HW_VER = 3.00.a
 PORT Slowest_sync_clk = clk_83_3333MHzPLL0
 PORT Ext_Reset_In = sys_rst_s
 PORT MB_Debug_Sys_Rst = Debug_SYS_Rst
 PORT Dcm_locked = Dcm_all_locked
 PORT MB_Reset = mb_reset
 PORT Bus_Struct_Reset = sys_bus_reset
 PORT Peripheral_Reset = sys_periph_reset
END

BEGIN xps_intc
 PARAMETER INSTANCE = xps_intc_0
 PARAMETER HW_VER = 2.01.a
 PARAMETER C_BASEADDR = 0x81800000
 PARAMETER C_HIGHADDR = 0x8180FFFF
 PARAMETER C_IRQ_IS_LEVEL = 1
 BUS_INTERFACE SPLB = mb_plb
 PORT Irq = Interrupt
 PORT Intr = RS232_Uart_1_IP2INTC_Irpt & xps_timer_0_Interrupt
END

BEGIN xps_timer
 PARAMETER INSTANCE = xps_timer_0
 PARAMETER HW_VER = 1.02.a
 PARAMETER C_BASEADDR = 0x83C00000
 PARAMETER C_HIGHADDR = 0x83C0FFFF
 BUS_INTERFACE SPLB = mb_plb
 PORT Interrupt = xps_timer_0_Interrupt
END

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Explorer
Explorer
7,690 Views
Registered: ‎08-14-2007

Re: XPS Timer, system ticks

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Ahh, I'd missed that you are using the INTC perpiheral as well - the wiring looks OK - can you post the software that initialises the INTC.

 

When you chipscoped, were you looking at the interrupt pin from the timer to the INTC or from the INTC to the microblaze?

Martin Thompson
martin.j.thompson@trw.com
http://www.conekt.co.uk/capabilities/electronic-hardware
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Visitor kolobok1386
Visitor
6,565 Views
Registered: ‎08-23-2011

Re: XPS Timer, system ticks

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I'm looking at interrupt form timer, it seems there are no interrupts from timer. I make interrupt signal from timer external and look with oscillograph - there are no interrupts. And I make GenerateOut0 signal external - there was a 1 clock cycle interrupt as I need. What's wrong???

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Explorer
Explorer
6,558 Views
Registered: ‎08-14-2007

Re: XPS Timer, system ticks

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Are you getting *1* interrupt from the timer? You have to clear it every time IIRC.

Can you try clearing it manually from XMD and see if it then happens once?
Martin Thompson
martin.j.thompson@trw.com
http://www.conekt.co.uk/capabilities/electronic-hardware
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Visitor kolobok1386
Visitor
6,556 Views
Registered: ‎08-23-2011

Re: XPS Timer, system ticks

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Sorry, but I don't understand what do you mean.... IIRC -  what this? What I have to clear??

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Explorer
Explorer
6,551 Views
Registered: ‎08-14-2007

Re: XPS Timer, system ticks

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Sorry, IIRC is "if I recall correctly".

You have to clear the interrupt flag each time an interrupt happens to get the next one. Write a '1' to T0INT in TCSR0 to clear it. You can try this from XMD and see if you then see another interrupt transition on the interrupt line.
Martin Thompson
martin.j.thompson@trw.com
http://www.conekt.co.uk/capabilities/electronic-hardware
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Visitor kolobok1386
Visitor
6,550 Views
Registered: ‎08-23-2011

Re: XPS Timer, system ticks

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Ye I've tried to write there are a '1' bit to clear - there no interrupts too...(((( And I did it right now - the same result....

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Explorer
Explorer
9,015 Views
Registered: ‎08-14-2007

Re: XPS Timer, system ticks

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Hmmm.

have you checked the .pad file to make sure the interrupt pin is the one you think it is supposed to be on? I've had pins move around occasionally for reasons which only became clear much later on...


This is what I would try next:
* Set the reset value to something *much* bigger to give yourself a second or two of time
* reset the timer and the interrupt at the same time
* keep reading the registers, check that the timer is decrementing and the interrupt flag has gone low
* keep looking until the timer wraps, check that the interrupt has gone high.

Check with both chipscope and a oscilloscope.
Martin Thompson
martin.j.thompson@trw.com
http://www.conekt.co.uk/capabilities/electronic-hardware
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Visitor kolobok1386
Visitor
6,535 Views
Registered: ‎08-23-2011

Re: XPS Timer, system ticks

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Thanks a lot!!! I put a very big value into load register and set '0' to t0int bit and then I get an interrupt signal. And now one more question: have I set '0' in interrupt handler??? And how to make microblaze edge sensitive for interrupt signal(in advanced settings this option disabled, and I can't switch to edge sensitive)???

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Explorer
Explorer
6,532 Views
Registered: ‎08-14-2007

Re: XPS Timer, system ticks

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You have to clear the t0int bit in the interrupt service routine (by writing '1' to it according to the docs)

You don't need to make microblaze edge sensitive, the interrupts are going through the INTC. that should be self-configuring to get the right sort of interrupts. But you also have to manage this correctly.

Use the Xilinx provided driver (or read the datasheet)
* Setup the INTC
* Start the INTC
* Map the interrrupt to your driver
* Enable your interrupt in the INTC
* Enable the global interrupt in the INTC
* enable interrupts on the microblaze.

If you bring out the "Interrupt" signal (the output of the INTC to the microblaze) you should be able to see that operating too. You're nearly there I hope :)
Martin Thompson
martin.j.thompson@trw.com
http://www.conekt.co.uk/capabilities/electronic-hardware
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