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acochrane
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Registered: ‎09-22-2019

(XSDB Server)ERROR: [Hsi 55-1518] No design name specified

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I am trying to implement a microblaze MCS IP on Basys3 board using Vivado 2018.3.

I am able to generate ip, instantiate the ip and synthesize the design in Vivado.

Problem occurs in Xilinx SDK when creating the new project... "Hardware Platform Specification".

I select the target hardware specification as "<project name>.src/ip/sources_1/ip/microblaze_mcs_0/microblaze_mcs_0.xml" then there is a little bit of processor churn before the console spits out the error:

==========================================================
14:30:55 ERROR : (XSDB Server)ERROR: [Hsi 55-1518] No design name specified

14:30:55 ERROR : Failed to closehw "/home/*******/src/xilinx_lab/*******/mcs_0/mcs_0.srcs/sources_1/ip/microblaze_mcs_0/microblaze_mcs_0.xml"
Reason: ERROR: [Common 17-39] 'hsi::close_hw_design' failed due to earlier errors.
==========================================================

I'm guessing this is a trivial error associated with me not really knowing how to setup the SDK workspace. But I don't know where to start sorting this out.

Any suggestions? Thanks!

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acochrane
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Registered: ‎09-22-2019
I got past this problem, by using an hdf file instead of the xml described above.
Before switching from Vivado to SDK, I used Vivado to export the hardware (description file?) by using the "File->Export->Export Hardware..." menu item.

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acochrane
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Registered: ‎09-22-2019
I got past this problem, by using an hdf file instead of the xml described above.
Before switching from Vivado to SDK, I used Vivado to export the hardware (description file?) by using the "File->Export->Export Hardware..." menu item.

View solution in original post

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