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Matthew_Ge
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Registered: ‎12-01-2020

Xilinx Zynq-7000 SDK debug breakpoint does not work

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Hi there,

I encounter a problem when I use Xilinx SDK breakpoint to debug my code.

Currently we are working on a project using Xilinx Zynq-7000  (XC7Z020-2CLG484I). On the Zynq-7000 , I  run Linux on Core #0, and freeRTOS on Core #1.  The  problem is that when I use Xilinx SDK to debug the application code on Core#1, I am able to use the SDK to set the breakpoints on the code. But the breakpoints are never being triggered even I set the breakpoints at  places the code has to be executed.

 

The following is the debug environment configuration details

 

----JTAG-HS3 Rev A is used to connect the a SDK host Linux laptop to the L3Harris target board.

----The SDK version: 2016.3.

----I use “System Debugger”

---- Under Target setup tab , Debug type = Attach to running target; Connection =”local”

---  I use Vaivado (version 2016.3) hardware manager to connect to the target.

 

 

Right now, when the board is up running,  on SDK debug panel, I can see the following

 

      APU

          ARM Cotex-A9 MPCore#0 (running)

          ARM Cotex-A9 MPCore#1 (running)

     XC7Z020

 

 

I can suspend the core 0 or 1 through the SDK.  The SDK is able to show where the code is suspended on the source code file. I think the elf symbol file is working.  But when I put a breakpoint even in the next line of where the code is suspended, the breaking won’t be trigged when I resume the core #1. 

 

Any ideas

 

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Matthew_Ge
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Registered: ‎12-01-2020

It works now. The SDK connection and configuration is correct. My debug target  comprises of multiple subsystems. There is a certain power sequence for the debug target. Once I figured that out, the breakpoint problem went away. Both soft and HW breakpoints work fine,

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charysm
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Registered: ‎10-22-2020

After setting the breakpoint, can you see anything in the breakpoint properties?

It helped me once to find an issue when I had the same problem. But in my case I had a remote connection to the target, and it turned out that the remote machine with the JTAG debug cable connected to the board needed to have access to the .elf file in the same folder and filename as my local debug session. It could be solved by copying the .elf to a network location known to both machines as a post-build step. Anyways, it seems that you are connecting locally.

 

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Matthew_Ge
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Registered: ‎12-01-2020

It works now. The SDK connection and configuration is correct. My debug target  comprises of multiple subsystems. There is a certain power sequence for the debug target. Once I figured that out, the breakpoint problem went away. Both soft and HW breakpoints work fine,

View solution in original post