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Visitor liambeguin
Visitor
302 Views
Registered: ‎01-13-2020

ZCU102 FSBL error

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Hi, 

I generated a FSBL using the embeddedsw.git repo and tcl scripts, packaged it in a BOOT.BIN and tried to load it on an SD Card.

The system boots on one ZCU102 but fails on a new ZCU102 devboard I have with the following log:

 

Xilinx Zynq MP First Stage Boot Loader 
Release 2018.2   Jan  9 2020  -  15:44:55
Reset Mode      :       System Reset
Platform: Silicon (4.0), Cluster ID 0x80000000
Running on A53-0 (64-bit) Processor, Device Name: XCZU9EG
FMC VADJ Configuration Successful
Board Configuration successful
Processor Initialization Done 
================= In Stage 2 ============ 
SD1 with level shifter Boot Mode 
SD: rc= 0
File name is BOOT.BIN
Multiboot Reg : 0x0 
Image Header Table Offset 0x8C0 
*****Image Header Table Details******** 
Boot Gen Ver: 0x1020000 
No of Partitions: 0x3 
Partition Header Address: 0x440 
Partition Present Device: 0x0 
Initialization Success 
======= In Stage 3, Partition No:1 ======= 
UnEncrypted data Length: 0x31F4 
Data word offset: 0x31F4 
Total Data word length: 0x31F4 
Destination Load Address: 0xFFFEA000 
Execution Address: 0xFFFEA000 
Data word offset: 0xF980 
Partition Attributes: 0x117 
Partition 1 Load Success 
======= In Stage 3, Partition No:2 ======= 
UnEncrypted data Length: 0x390A8 
Data word offset: 0x390A8 
Total Data word length: 0x390A8 
Destination Load Address: 0x8000000 
Execution Address: 0x8000000 
Data word offset: 0x12B80 
Partition Attributes: 0x3114 
CheckSum Type - SHA3
Xilinx Zynq MP First Stage Boot Loader 
Release 2018.2   Jan  9 2020  -  15:44:55
Reset Mode      :       System Reset
Platform: Silicon (4.0), Cluster ID 0x80000000
Running on A53-0 (64-bit) Processor, Device Name: XCZU9EG
FMC VADJ Configuration Successful
Board Configuration successful
XFSBL_ERROR_SYSTEM_WDT_RESET
================= In Stage Err ============ 
Fsbl Error Status: 0x00000009

I have no idea why the system seems to reset after: "CheckSum Type - SHA3" or why I get a XFSBL_ERROR_SYSTEM_WDT_RESET. 

Any ideas what might be causing this board to fail?

I tried configuring the switches and jumpers in the same way but no luck there...

Thanks in advance for any help, 

Liam

 

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Moderator
Moderator
215 Views
Registered: ‎11-09-2015

Re: ZCU102 FSBL error

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Hi @liambeguin 

There was a change in the DDR4 SODIMM on the new ZCU102 (and ZCU106). You might want to refer to AR#71961. The workaround are mentioned in it

 


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**

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3 Replies
Moderator
Moderator
216 Views
Registered: ‎11-09-2015

Re: ZCU102 FSBL error

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Hi @liambeguin 

There was a change in the DDR4 SODIMM on the new ZCU102 (and ZCU106). You might want to refer to AR#71961. The workaround are mentioned in it

 


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**

View solution in original post

Visitor liambeguin
Visitor
200 Views
Registered: ‎01-13-2020

Re: ZCU102 FSBL error

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Thanks for pointing out that difference. I'll try a new FSBL with the patches.

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Visitor liambeguin
Visitor
158 Views
Registered: ‎01-13-2020

Re: ZCU102 FSBL error

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Hi,

 

After cherry-picking following commits on top of xilinx-v2018.2, the board boots as expected:

  • 86626ad3261e (ddrcpsu: Add support to extract DDR parameters information, 2018-07-13)
  • 5321d5c981d9 (sw_apps: zynqmp_fsbl: Add DDR initialization support for new DIMM, 2018-07-13)

 

Thanks for your help

Liam