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Visitor zhangxixi
Visitor
549 Views
Registered: ‎07-23-2018

ZCU102 Quad-SPI flash partial reconfiguration image question

Hello,

 

I'm using ZCU102 to do partial reconfiguration project.

I have tested my partial reconfiguration IPs in JTAG mode and they work well.

 

Now, I'm moving bitstreams to SPI flash as its faster. I have several questions for making a boot image for SPI.

 

Q1. ZCU102 has a Quad-SPI Flash(ZCU102 page 33), therefore I can select interface as SPIx4 in "write memory configuration file".?  Here occur error: 

 

[Writecfgmem 68-20] SPI_BUSWIDTH property is set to "1" on bitfile C:/UNET/PR/DSP_2/DSP_2.runs/impl_1/design_1_wrapper.bit. This property has to be set to "4" to generate a configuration memory file for the SPIX4 interface. Please ensure that a valid value has been set for the property BITSTREAM.Config.SPI_buswidth and rerun this command.

 

When I went back to design, I tried with TCL command "set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 4 [current_design]".

Here occur error:

ERROR: [Netlist 29-69] Cannot set property 'BITSTREAM.CONFIG.SPI_BUSWIDTH', because the property does not exist for objects of type 'design'.
Resolution: Modify .xdc or RTL to not set this property or move it to one of the following object types that can accept this property: bd_intf_net,bd_cell,diagram,bd_port,bd_net

 

I also tried to "add properties" to my design, but there is no "BITSTREAM.CONFIG.SPI_BUSWIDTH" option (searching results here.)

 

several references I tried:

https://forums.xilinx.com/t5/Vivado-TCL-Community/BITSTREAM-CONFIG-SPI-BUSWIDTH-is-not-available/td-p/396801

https://forums.xilinx.com/t5/Vivado-TCL-Community/BITSTREAM-properties-in-script-when-where-to-set/td-p/703203

 

For this problem, if the interface is selected as SPIx1, there won't be any problem generating the image. But the bandwidth will be 8 bit?

 

Q2. I continue with SPIX1 and "load data files" to add my partial reconfiguration bitstream.

According to Page 65 in:

https://www.xilinx.com/support/documentation/ip_documentation/prc/v1_0/pg193-partial-reconfiguration-controller.pdf#page=65&zoom=100,0,92

 

I should make corresponding bin file first and load it. However, I select bit file for reconfiguration bitstream and it processed.

Is this okay?

 

Q3. I can't find the SPI Flash part MT25QU512ABB8ESF for ZCU102, which is stated in its user guide.

 

 

 

Can anyone advise me regarding the two questions above?

 

-Thanks

 

 

 

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Xilinx Employee
Xilinx Employee
465 Views
Registered: ‎10-30-2017

Re: ZCU102 Quad-SPI flash partial reconfiguration image question

Hi @zhangxixi ,

You can select the bus width of the SPI in Zynq MP GUI. It is not possible to set the spi width using the tcl in case of Zynq MP.

Best Regards,
Srikanth
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