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riwa
Contributor
Contributor
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Registered: ‎05-12-2015

parallella elink project redesign

Hi

 

I'm trying to redesign the elink project, and change the original www.parallella.org/2015/03/23/new-parallella-elink-fpga-design-project-now-available-in-vivado/

github.com/parallella/parallella-hw/tree/master/fpga/vivado/releases

How can I deleate every sub-system files about the IPs?
I'm doing a very simple design should I keep the constraints files as they are?

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