partial bitstream problem in partial reconfiguration with EAPR
doing dynamic partial reconfiguration with EAPR method. When I copy system.ace
and two partial bitstream files into the CF card, the design only works the
initial configuration. The software runs well but I can’t configure the partial
bitstream p1.bit. I use XHWICAP_CF2ICAP(&myicap, p1.bit) function to read
the partial bitstream.
I use ml403 board and the HWICAP version (1.00.b
for the ip and 1.00.c for the driver) has no problem. The
Xilinx tools I used are EDK 9.1.02i and ISE 9.1.02i _PR10 .
I have checked the partial stream by
downloading it with impact tool and found that it give no results, maybe there
is something wrong with the partial bitstream when generated.
I also traced the execution of
function XHWICAP_CF2ICAP(&myicap, *.bit) to send a small partial bitstream ,
all registers return value 1, and the software stopped at
xhwicap_parse.c. And the uart displayed “partition size according to partition
table =1012032,however this partition(0) has mor sectors(1012957) than the
partition size ”.
Does anyone use EAPR ?Have you
met this problem? And what is the problem with the partial bitsteam? How to resolve