plb_ddr_v2_00_a upgrade to mpmc_v4_03_a

[dhanisch]

I am trying to upgrade an older system using plb 3.4/opb interfaces to the plb_v4.6 interface and am having trouble with the memory controller upgrade.  I've read that the PLB_DDR memory controller provides a big endian connection to devices whereas the MPMC controller provides a little endian connection.  I know I need to swap pins to match the endianess, but does that mean I should swap all pins, just address pins, or just data pins?

Any suggestions?

--David 

[prateek_bhatt]

Hello. 

As far as swapping is concerned to tackle the big endian format you have to reverse every signal which is a vector.

Like address, data, DM, etc....as far as SDRAM is concerned.