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Visitor grinaldi
Visitor
7,601 Views
Registered: ‎10-28-2015

simulating "hello world" on a atlys board from external memory

Hello,

 

I am new to the forum and to Xilinx.

 

I have an atlys board, and I am trying to simulate (using Cadence IES) one of the example ("hello world")

loading the program on the external DDR2 memory. I am using EDK and SDK 14.7 which support spartan-6.

 

I am having trouble to initialize the memory at startup using the verilog readmemh() command. My problem

is to generate the correct .mem format. I could only find an application note XAPP1108 that shows how to do it,

but they have a different memory arrengment and Xilinx part; also it uses 2 scripts (edit_mem.pl and edit_mem_s.pl) to postprocess the .mem coming out from the data2mem. 

 

Here are the steps I have done so far:

1- Create the .elf file from the SDK using the linker to map the program into the DDR2 address. I can see in the generated elf that the address are correct.

2- updated the .bmm file with the external DDR2 memory map (I kept the 4 BRAM because of the first jump instruction to the external DDR2 space):

/////////////////////////////////////////////////////////////////////////////////////////////////////////////////////

ADDRESS_MAP microblaze_0 MICROBLAZE-LE 100
ADDRESS_SPACE microblaze_0_bram_block_combined COMBINED [0x00000000:0x00001fff]
ADDRESS_RANGE RAMB16
BUS_BLOCK
microblaze_0_bram_block/microblaze_0_bram_block/ramb16bwer_0 [31:24] INPUT = microblaze_0_bram_block_combined_0.mem ;
microblaze_0_bram_block/microblaze_0_bram_block/ramb16bwer_1 [23:16] INPUT = microblaze_0_bram_block_combined_1.mem ;
microblaze_0_bram_block/microblaze_0_bram_block/ramb16bwer_2 [15:8] INPUT = microblaze_0_bram_block_combined_2.mem ;
microblaze_0_bram_block/microblaze_0_bram_block/ramb16bwer_3 [7:0] INPUT = microblaze_0_bram_block_combined_3.mem ;
END_BUS_BLOCK;
END_ADDRESS_RANGE;
END_ADDRESS_SPACE;
END_ADDRESS_MAP;

///////////////////////////////////////////////////////////////////////////
// DDR2 Memory Address Space (128MB)
///////////////////////////////////////////////////////////////////////////

ADDRESS_BLOCK DDR2_memory MEMORY [0xC0000000:0xCFFFFFFF]
BUS_BLOCK
system_tb/inst_ddr_01 [15:8] OUTPUT = ddr2_1.mem;
system_tb/inst_ddr_00 [7:0] OUTPUT = ddr2_0.mem;
END_BUS_BLOCK;
END_ADDRESS_BLOCK;

/////////////////////////////////////////////////////////////////////////////////////////////////////////////////////

3- I run the data2mem to generate the .mem:

data2mem -bm system_sim_ext_mem.bmm -bd ./hello_word2.elf -bx ./ -p "xc6slx45csg324-3"

4- I got the 4 bram .mem files and the 2 ddr2 .mem files

5- I try to load the .mem in the test_bench but the simulation doesn't do anything ... the UART output doesn't move after 2ms:

$readmemh("ddr2_1.mem",system_tb.inst_ddr_01.memory);
$readmemh("ddr2_0.mem",system_tb.inst_ddr_00.memory);

6- I try also to run the 2 scripts from the other project with the same results. I am not sure what those 2 scripts do.

7- If I generate the elf with the linker pointing to the internal BMEM only the simulation works as expected.

 

Any suggestion?

 

Thanks,

Giacomo

 

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2 Replies
Scholar stephenm
Scholar
7,571 Views
Registered: ‎05-06-2012

Re: simulating "hello world" on a atlys board from external memory

Hey, I created an AR for this back in 2014.4. this is shown below:

http://www.xilinx.com/support/answers/62910.html

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Visitor grinaldi
Visitor
7,555 Views
Registered: ‎10-28-2015

Re: simulating "hello world" on a atlys board from external memory

Thanks Stephen,

 

Unfortunately I am stuck on ISE because I have a Spartan 6 Atlys board, but I will try to see if I can leverage

your AR, thanks :).

 

Giacomo

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