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4,177 Views
Registered: ‎03-04-2014

unable to get signal changes in chipscope with SDK

Hi all, I am new to SDK, I am instantiating SPI using the IPcore in Microblaze. I have simulated the design and verified the functionality. Then I added chipscope, and simulated again. The simulator throwed errors. ERROR:HDLCompiler:432 - "C:/Xilinx/14.2/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/chipscope_plbv46_iba_v1_03_a/simhdl/vhdl/chipscope_plbv46_iba.vhd" Line 184: Formal has no actual or default value. ERROR:HDLCompiler:432 - "C:/Xilinx/14.2/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/chipscope_plbv46_iba_v1_03_a/simhdl/vhdl/chipscope_plbv46_iba.vhd" Line 212: Formal has no actual or default value. ERROR:HDLCompiler:432 - "C:/Xilinx/14.2/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/chipscope_plbv46_iba_v1_03_a/simhdl/vhdl/chipscope_plbv46_iba.vhd" Line 213: Formal has no actual or default value. ERROR:HDLCompiler:432 - "C:/Xilinx/14.2/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/chipscope_plbv46_iba_v1_03_a/simhdl/vhdl/chipscope_plbv46_iba.vhd" Line 214: Formal has no actual or default value. ERROR:HDLCompiler:432 - "C:/Xilinx/14.2/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/chipscope_plbv46_iba_v1_03_a/simhdl/vhdl/chipscope_plbv46_iba.vhd" Line 215: Formal has no actual or default value. Then i stopped simulation, i generated bitstream and downloaded .elf file into FPGA, i didn't get signal changes in chipscope, i checked in hardwareby using oscilloscope, iam getting correct signals changes. i am unable to monitor signal change in chipscope along with SDK, Please give me solution for this problem. Regards Balaji
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Xilinx Employee
Xilinx Employee
4,168 Views
Registered: ‎08-02-2007

Re: unable to get signal changes in chipscope with SDK

Hi,

 

How are you instantiating Chipscope into the EDK sub-system?

 

Here is the example. link

 

--Hem

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4,162 Views
Registered: ‎03-04-2014

Re: unable to get signal changes in chipscope with SDK

Hi sir,

 

          Thank you for your reply,  first i added chipscope ip ILA, IBA to my design in EDK, and i generated bitstream and exported it to SDK, there i written C code and downloaded .elf file into FPGA. After i launched chipscope  and i imported my .cdc file to chipscope, there i didn't get triggers of signals, but i got correct results ion hardware by checking in oscilloscope. please help to solve this problem.

 

 

 

Thanks&Regards

Balaji

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