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Xilinx Employee
Xilinx Employee
12,283 Views
Registered: ‎02-01-2008

Re: using both CPU cores on Zynq?

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Participant jakubon2
Participant
12,252 Views
Registered: ‎04-02-2013

Re: using both CPU cores on Zynq?

 Hi John,

 

I am trying XAPP1078 (Standalone/Linux) for SDK 14.5 on SDK 14.6. When I try to create the BSP app_cpu1_bsp, I get the following errors:

 

gmake[1]: *** [libs] Error 1 standalone_amp_bsp_0 C/C++ Problem
gmake[1]: *** [standalone_libs] Error 1 standalone_amp_bsp_0 C/C++ Problem
make: Target `all' not remade because of errors. standalone_amp_bsp_0 C/C++ Problem
make: *** [ps7_cortexa9_1/lib/libxil.a] Error 2 standalone_amp_bsp_0 C/C++ Problem
gmake[1]: Target `libs' not remade because of errors. standalone_amp_bsp_0 C/C++ Problem

 

When I do not use DUSE_AMP=1 option, the error do not appear. 

 

Is there anything little to make the BSP work on SDK 14.6 or should I revert to older versions? I noticed that SDK 14.6 uses *_10 version of Standalone BSP, whereas 14.5 uses *_9. 

 

Speaking about that, could be the AMP options for Standalone BSP a part of any Xilinx SDK release? 

 

Many thanks,

Ondrej

 

Ondrej
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Xilinx Employee
Xilinx Employee
12,243 Views
Registered: ‎02-01-2008

Re: using both CPU cores on Zynq?

Those error messages aren't complete so it's hard to see the full error.

 

I posted 14.6 updates for xapp1079 which uses a modified standalone BSP 3.10.a. I think the modified BSP will still work for xapp1078. I will not have time to look at it before the holidays.

 

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Participant jakubon2
Participant
12,229 Views
Registered: ‎04-02-2013

Re: using both CPU cores on Zynq?

Hi John,

 

Thank you for your reply. I do apologise I bothered, I made a mistake in setting the constant USE_AMP, set "DUSE_AMP=1" only instead of "-DUSE_AMP=1". I am fine now, the BSP *_10 is now compiled. Enjoy holidays!

 

Many thanks!

Ondrej
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Contributor
Contributor
12,209 Views
Registered: ‎10-05-2013

Re: using both CPU cores on Zynq?

Hi,john

I try running baremetal/baremetal on both cores (ZC702) based on xapp1079. I want to handle interrupts on both cores, e.g. CPU0 is servicing the private timer interrupt (XPS_SCU_TMR_INT_ID) whose ID is 29 while CPU1 handles PL interrupt (XPS_IRQ_INT_ID) which is SPI interrupt and its ID is 91.

Apparently setting up the ICD, enabling interrupts and registering handlers on both cores is not the right way .

CPU0 seems to run and service the private timer interrupt properly, but enabling IRQ on CPU1 seems to stall CPU1. It looks like, as if CPU1's IRQ handler couldnot never be acknowledged.

In xapp1079, I could only find cpu1 servicing private interrupt but cpu0 doesnot servicing shared interrupt ,so could you show me a referenced design or show me some advice?

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Participant jakubon2
Participant
12,178 Views
Registered: ‎04-02-2013

Re: using both CPU cores on Zynq?

Hi John,

 

I am trying to make AMP Baremetal/Linux work on ZedBoard. I am getting a bit confused which Linux versions of the kernel, u-boot, device tree should I use? I am having SDK 14.6 (2013.2), using Standalone BSP _10 from 14.6 for AMP Baremetal/Baremetal EDK 14.6. I tried the link on XAPP1078 Wiki for ZedBoard which is not working yet. I managed to run the FSBL, download the bitstream and run the u-boot for both 14.5 and 14.3 u-boot, having then problems with loading the Linux kernel image.

 

For 14.5 Linux, I got the error of INITRD being out of the memory range (larger than 0x1000 0000 which in the CPU1's address range). For 14.3 Linux, I just got

 

"**Unable to read "zImage" from mmc 0:1".

 

I believe this can be a similiar memory problem as someone suggests on ZedBoard forum that even older u-boot has to be used to overcome this problem http://www.zedboard.org/content/zedboard-amp-solution.

 

Any suggestions would be much appreciated.

 

Many thanks!

Ondrej
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Participant jakubon2
Participant
12,159 Views
Registered: ‎04-02-2013

Re: using both CPU cores on Zynq?

I am finding that the memory address for ramdisk and devicetree load by U-Boot can be limited by setting environment variables fdt_high and initrd_high for U-Boot, from this thread http://www.zedboard.org/content/linux-kernel-panic-boot-mem256m. Is there any way how to automate the settings of these variables for U-Boot during the boot procedures, e.g. in via BIF file, by calling bootgen or in FSBL? 

 

Many thanks!

Ondrej
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Participant jakubon2
Participant
12,163 Views
Registered: ‎04-02-2013

Re: using both CPU cores on Zynq?

I found the way to change the environment variables permanently in U-Boot:

  1. When the bootloader waits for hitting the key (default 3 seconds), press a key and enter the bootloader.
  2. Enter the following commands: setenv fdt_high 0x10000000setenv initrd_high 0x10000000, saveenv.
  3. After reboot, the problem is of the incorrect memory location for ramdisk and devicetree is over. 

Thanks

Ondrej
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Participant jakubon2
Participant
12,162 Views
Registered: ‎04-02-2013

Re: using both CPU cores on Zynq?

Also, I needed to add initrd=0x09ae0000,8M to bootargs in the devicetree and change console to ttyPS1 from ttyPS0 for ZedBoard. Now getting an issue with RAM disk, cannout mount any filesystem as a root resulting in kernel panic, see the attached image.

 

Cheers

Ondrej
ramdisk_kernel_panic.png
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Xilinx Employee
Xilinx Employee
12,141 Views
Registered: ‎02-01-2008

Re: using both CPU cores on Zynq?

I haven't tried it but it should work.

 

Since cpu1 stalls, I would guess that cpu1 is receiving the interrupt but either the service routine isn't registered correctly or the service routine isn't acknowledging the interrupt.

 

Once cpu1 stalls, connect to it with xmd and then 'rrd'. Look at where the PC is located. In xmd you can single step to get a feel for where the cpu1 is stuck.

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Xilinx Employee
Xilinx Employee
12,094 Views
Registered: ‎02-01-2008

Re: using both CPU cores on Zynq?

Sorry but I don't have a zedBoard so am unable to comment on the memory map/allocation. A person from Avnet converted the original xapp. I suggest you post your questions on Avnet's forum.

 

Regarding default u-boot environment, take a look at include/configs/zynq_common.h

 

 

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Xilinx Employee
Xilinx Employee
12,091 Views
Registered: ‎02-01-2008

Re: using both CPU cores on Zynq?

Have you tried a known good ramdisk image?

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Contributor
Contributor
12,084 Views
Registered: ‎10-05-2013

Re: using both CPU cores on Zynq?

hi, john

  thanks for your advice ,I have tried it as you told me and the cpu1 now could run to the end smoothly but the interrupt 91 could never be acknowledged.I don't  know why?

    Now I have changed my project to this : CPU0 is servicing the SPI  whose ID is 91 while CPU1 handles two PL PPI interrupts one is IRQ whose ID is 31 and the other one is FIQ whose ID is 28.

when I debug two cores ,cpu0 seems working properly and IRQ in CPU1 could be serviced normally, but only FIQ could be serviced only once .I don't know why?

 

the below is  the partional code in cpu1

.....................

int main()
{
 int Status;

 Xil_Out32(intr1_test_addr, 0x00000000);
 Xil_Out32(intr3_test_addr, 0x00000000);
    //Disable cache on OCM
 Xil_SetTlbAttributes(0xFFFF0000,0x14de2);           // S=b1 TEX=b100 AP=b11, Domain=b1111, C=b0, B=b0

 print("CPU1: Hello World CPU 1\n\r");

    // Initialize driver instance

 Status = SetupIntrSystem(&IntcInstancePtr,
      &PlIrqInstancePtr,
      31);
 if (Status != XST_SUCCESS) {
  return XST_FAILURE;
 }

    //enable interrupt 31 and 28
 Xil_Out32(intr1_test_addr, 0x00000001);
  Xil_Out32(intr3_test_addr, 0x00000001);


 while(1);

    return 0;
}


static int SetupIntrSystem(INTC *IntcInstancePtr,
  XPlIrq *PeriphInstancePtr,
    u16 IntrId)
{
 int Status;


 XScuGic_Config *IntcConfig;
 IntcConfig = XScuGic_LookupConfig(INTC_DEVICE_ID);
 if (NULL == IntcConfig) {
  return XST_FAILURE;
 }

 Status = XScuGic_CfgInitialize(IntcInstancePtr, IntcConfig,
     IntcConfig->CpuBaseAddress);
 if (Status != XST_SUCCESS) {
  return XST_FAILURE;
 }
 Status = XScuGic_Connect(IntcInstancePtr, IntrId,
     (Xil_ExceptionHandler)PlIntrHandler,
     PeriphInstancePtr);
 if (Status != XST_SUCCESS) {
  return Status;
 }
 XScuGic_Enable(IntcInstancePtr, IntrId);
 Xil_ExceptionInit();

 Xil_ExceptionRegisterHandler(XIL_EXCEPTION_ID_INT,
    (Xil_ExceptionHandler)INTC_HANDLER,
    IntcInstancePtr);

  Xil_ExceptionRegisterHandler(XIL_EXCEPTION_ID_FIQ_INT,

         (Xil_ExceptionHandler)FIQIntrHandler,
          IntcInstancePtr);
 /*
  * Enable non-critical exceptions
  */
 Xil_ExceptionEnable();
  Xil_FIQExceptionEnable();


 return XST_SUCCESS;
}


static void PlIntrHandler(void *CallBackRef)
{

 XPlIrq *InstancePtr = (XPlIrq *)CallBackRef;

 /*
  * Clear the interrupt source
  */
 Xil_Out32(intr1_test_addr, 0x00000000);

}
static void FIQIntrHandler(void *CallBackRef)
{

 /*
  * Clear the interrupt source
  */
Xil_Out32(intr3_test_addr, 0x00000000);

}

..............

and I have used the following modified function

void XScuGic_InterruptHandler1(XScuGic *InstancePtr)
{

 

u32 IntID;
u32 IntIDFull;
XScuGic_VectorTableEntry *TablePtr;
Xil_AssertVoid(InstancePtr != NULL);
IntIDFull = XScuGic_CPUReadReg(InstancePtr, XSCUGIC_INT_ACK_OFFSET);
IntID = IntIDFull & XSCUGIC_ACK_INTID_MASK;
if(XSCUGIC_MAX_NUM_INTR_INPUTS < IntID){
goto IntrExit;
}
TablePtr = &(InstancePtr->Config->HandlerTable[IntID]);
TablePtr->Handler(TablePtr->CallBackRef);
IntrExit:
XScuGic_CPUWriteReg(InstancePtr, XSCUGIC_EOI_OFFSET, IntIDFull);
}
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Participant jakubon2
Participant
12,079 Views
Registered: ‎04-02-2013

Re: using both CPU cores on Zynq?

Hi John,

 

Thank you so much for your response! I will get in touch with Avnet technical support. Luckily, I have found a link on ZedBoard's website http://zedboard.org/design/1521/11 which provides source and generated files for XAPP1078 ZedBoard, 14.3 ISE and v14.5 tagged repositories for Linux assembly. Maybe, you can crosslink that on your Wiki webpage on XAPP1078 latest information, since the link for ZedBoard therein is currently out of service. I tried several prebuilt RAM disk images from Xilinx Wiki Linux website related to different Linux releases and they all seem to produce the same result. 

 

Kind regards

 

 

Ondrej
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Xilinx Employee
Xilinx Employee
12,055 Views
Registered: ‎02-01-2008

Re: using both CPU cores on Zynq?

Taking a quick look at your snipet, I only see XScuGic_Connect() called for 31 and not for 28.

 

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Contributor
Contributor
12,045 Views
Registered: ‎10-05-2013

Re: using both CPU cores on Zynq?

Thank you for your reply.

as for FIQ whose ID is 28, I didn't use XScuGic_Connect() and XScuGic_InterruptHandler() which is written by XILINX.

 after XScuGic is initialized  ,I just use the folowing functions:

 

          Xil_ExceptionRegisterHandler(XIL_EXCEPTION_ID_FIQ_INT,

           (Xil_ExceptionHandler)FIQIntrHandler,
            IntcInstancePtr);
         /*
        * Enable fiq exception
        */
       Xil_FIQExceptionEnable();

 

 

and the FIQIntrHandler()   is as folows

static void FIQIntrHandler(void *CallBackRef)
{

/*
* Clear the interrupt source
*/
Xil_Out32(intr_Fiq_test_addr, 0x00000000);

}

 

when I only test FIQ in a single CPU ,it could be serviced properly but when I use it here ,it  could  be serviced only once.So I don't know why? You mean I should use XScuGic_Connect() and XScuGic_InterruptHandler() functions if I want to service FIQ properly ?and if so , should I modify XScuGic_InterruptHandler()?

 

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Observer greatgehar
Observer
11,932 Views
Registered: ‎07-24-2012

Re: using both CPU cores on Zynq?

Hi John.

I ran xapp1078 on my zc706 (Linux/baremetal). I limited memory in device tree for Linux, as show in xapp1078 (low 750 MB available):

memory {

    device_type = "memory";

    reg = <0x00000000 0x30000000>;

};

 

But when loaded the Linux kernel in console output:

Memory: 1024MB = 1024MB total

Memory: 1011604k/1011604k available, 36972k reserved, 270336K highmem

 

And command “cat /proc/meminfo” show:

zynq> cat /proc/meminfo

MemTotal:        1033284 kB

MemFree:         1002320 kB

 

As I understand, Linux use all 1024 MB DDR memory and ignore limitation in device tree. How fix it?

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Participant saber26
Participant
11,759 Views
Registered: ‎03-18-2014

Re: using both CPU cores on Zynq?

Hello,

 

Is it possible to run an application with Linux/Linux on both CPU cores ? 

And could you please send me your example Standalone/Standalone ? 

 

Thank you

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Visitor sosod
Visitor
10,656 Views
Registered: ‎05-06-2014

Re: using both CPU cores on Zynq?

Hello,

 

I'm currently working with Zynq ZC702 and I'm trying to run baremetal application on both cores.

First I succeed debugging and running an app on the first cpu only. Now I try to use the second cpu.

I'd like to know if it is possible to debug apps on both cpu at the same time.

I'm working with SDK 14.7.

 

Thanks

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Xilinx Employee
Xilinx Employee
10,610 Views
Registered: ‎02-01-2008

Re: using both CPU cores on Zynq?

It's best to start a new thread when you post. I see I missed some questions a while ago.

 

If you are using SDK 14.7, it supports System Debugger which makes it really easy to debug both cpus. When you create your debug configuration, choose system debugger instead of gdb. You will be able to view and control both cpus in the debug window. Within the debug configuration, you can assign which app is running on each cpu. If you do not do this and see assembly instead of your C source on say cpu1, right click on 'ARM Cortex-A9 MPCore #1 (Breakpoint)', select edit <debug config name>, select symbolFiles tab, set debugContext to cpu1 then add your elf and set the base address used in your linker script.

 

System debugger will also gracefully allow you to connect to a running system (handy if you boot from SD or simular).

 

 

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Visitor sosod
Visitor
11,887 Views
Registered: ‎05-06-2014

Re: using both CPU cores on Zynq?

Hi John,

 

Thank you for your answer.
I succeed debugging both cpus. However I have some problems with my application.
I try to follow the example xapp1079 but I think it's not compatible with Xilinx SDK 14.7. Indeed it can't compile the amp_fsbl because the -lrsa library is not find. And when I use the predefined fsbl, the compile can't find the define "XPAR_IRQ_GEN_0_BASEADDR" in app_cpu1.c.
So I try to do it on my own but I must have misdone something because it's not working. I use the predefine fsbl in Xilinx SDK. Do I have to modify it to enable both cpus?
If you have an example of baremetal appication on both cpu for Xilinx SDK 14.7, it would be useful for me.

 

Thanks

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Explorer
Explorer
11,869 Views
Registered: ‎03-22-2014

Re: using both CPU cores on Zynq?

hello

 

i readed all this discussion, really it's so nice to found people like you, answer on question, and try to foudn solution for people like us :) 

i have a project : run MJPEG on ZedBoard ( i use Xillinux ( based on Ubuntu 12.04)  as an OS with SMP )

i have the code source of MJPEg in 2 version ( serial and parallel ) 

 

1- have idea how, can i run or affect the .c fite to run just on the first CPU ( no problem CPU0 or CPU1), just i need to run this application on single CPU

2- the second version of MJPEG is parrelel, have you any idea, or previous example, where can we affect or run one thread on the PL , ( i didn't found any documentation about this )


also, i created a new post, please can you check it on this this link 

 

the following picture, show activities of the PS  ( 2 ARM )

thank you

Screenshot from 2014-05-08 13_02_34.png

 

My blog : www.xilinx-video.blogspot.com
Tags (5)
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Adventurer
Adventurer
11,465 Views
Registered: ‎03-27-2014

Re: using both CPU cores on Zynq?

Has anyone gotten AMP mode (Linux + Baremetal) working on ZC706 with Vivado tools? I don't really care for the hardware design to generate interrupts. But just to start the two CPUs. I have Linux 3.14.12 kernel with Linaro filesystem working on one CPU but CPU1 doesn't boot up.

 

I did make the change to the 0xfffffff0 location being 0xffffff2c and limiting DDR use to first 768 MB. app_cpu1 was compiled with standalone_v4_9 BSP.

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Observer greatgehar
Observer
11,442 Views
Registered: ‎07-24-2012

Re: using both CPU cores on Zynq?

I gotten AMP mode (Linux + Baremetal) working on ZC706 with ISE 14.7. I use Xilinx-Linux v3.5.0-14.3-build2.

Maybe my experience help you:
1. Modifying the Linux Kernel (http://www.wiki.xilinx.com/XAPP1078+Latest+Information)
Note: for new kernel versions you must modify zynq_boot_secondary() function in arch/arm/mach-zynq/platsmp.c:
static int zynq_boot_secondary(unsigned int cpu,
                        struct task_struct *idle)
{
    if (cpu == 1)
    {
        pr_info("CPU%u configure for standalone application\n", cpu);
        return zynq_cpun_start(0xffffff2c, cpu);
    }
    return zynq_cpun_start(virt_to_phys(zynq_secondary_startup), cpu);
}
2. Modify devicetree.dtb
Note: Don't use maxcpus=1 in bootargs. Modifying zynq_boot_secondary() enough for start Baremetal app on cpu1.

If you will use maxcpus=1, then can't restart cpu1 after run cpu1.
In order to limit Linux memory I add "mem=749M memmap=1M@749M" in bootargs. (I can't limit Linux memory as

discribe in xapp1078)
My bootargs:
bootargs = "console=ttyPS0,115200 mem=749M memmap=1M@749M root=/dev/ram rw earlyprintk";
3. For restart cpu1: stop cpu1, download app for cpu1 to memory,start cpu1:

# *** Restore memory at address 0xfffffff0
./rwmem 0xfffffff0 0xffffff2c
# *** Stop cpu1
# 0xf8000244 - Address of slcr.A9_CPU_RST_CTRL register
./rwmem 0xf8000244 0x02    # assert reset
./rwmem 0xf8000244 0x22    # stop clock
# *** Download app for cpu1 to memory here

# *** Start cpu1
./rwmem 0xf8000244 0x20    # de-assert reset
./rwmem 0xf8000244 0x00    # run clock
# *** Start app for cpu1
./rwmem 0xfffffff0 <app cpu1 start address>

Adventurer
Adventurer
11,429 Views
Registered: ‎03-27-2014

Re: using both CPU cores on Zynq?

Thanks Great Gehar,

 

This was very useful though I still couldn't see sign of life yet. I made the change to Linux kernel platsmp.c and devicetree and was able to boot.

 

1. Kernel boot output:

l2x0: 8 ways, CACHE_ID 0x410000c8, AUX_CTRL 0x72760000, Cache size: 512 kB
CPU1 configured for standalone application
CPU1: failed to come online
Brought up 1 CPUs
SMP: Total of 1 processors activated.
CPU: All CPU(s) started in SVC mode.

...

...

# nproc

1

# cat /proc/meminfo
MemTotal: 753804 kB
MemFree: 277836 kB
MemAvailable: 427556 kB

2. Then I tried to read and start the CPU1 but no sign of life unfortunately.

root@linaro-ubuntu-desktop# ./rwmem.elf 0xffff8000
0x00000000ffff8000 = 0x00000000
root@linaro-ubuntu-desktop# ./rwmem.elf 0xfffffff0
0x00000000fffffff0 = 0x00000000
root@linaro-ubuntu-desktop# ./rwmem.elf 0xfffffff0 0x30000000
root@linaro-ubuntu-desktop# ./rwmem.elf 0xfffffff0
0x00000000fffffff0 = 0x30000000
root@linaro-ubuntu-desktop# ./rwmem.elf 0xffff8000
0x00000000ffff8000 = 0x00000000
root@linaro-ubuntu-desktop# ./rwmem.elf 0xffff8000
0x00000000ffff8000 = 0x00000000
root@linaro-ubuntu-desktop# ./rwmem.elf 0xffff8000
0x00000000ffff8000 = 0x00000000

 

The OCM location for heart beat counter remains stuck at 0. 

 

I will say that these tests do not have the Xilinx hardware design with the interrupt generator. I am just hoping to see the heartbeat counter increment and I am not trying to use the interrupt messages at all.

 

3. I then tried to connect to Zynq via JTAG cable and read the PC. I see:

XMD% connect arm hw -debugdevice cpunr 2

XMD% rrd

r0: 0x800001f3 r1: 0x00000000 r2: 0x00000000 r3: 0x00000000
r4: 0x00000000 r5: 0x00000000 r6: 0x00000000 r7: 0x00000000
r8: 0x00000000 r9: 0x00000000 r10: 0x00000000 r11: 0x00000000
r12: 0x00000000 sp: 0x00000000 lr: 0x00000020 pc: 0x00000010
fpscr: 0x00000000 cpsr: 0x400001d7

 

Any further inputs would really help me though I do understand that you are busy and have already tried to provide a lot of inputs. Thanks!

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Adventurer
Adventurer
11,420 Views
Registered: ‎03-27-2014

Re: using both CPU cores on Zynq?

Great Gehar,

 

BTW - how did you generate the application for CPU1? Did you use standalone_v4_9 BSP? From which folder? XAPP1078  files or XAPP1079? Also, did you modify any code in the BSP (like boot.S) or app_cpu1.c or lscript.ld?

 

Thanks again!

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Observer greatgehar
Observer
11,377 Views
Registered: ‎07-24-2012

Re: using both CPU cores on Zynq?

"CPU1 configured for standalone application" - this you message in kernel?

After Linux download, at address 0xfffffff0 must be value 0xffffff2c, but in you Linux 0x00. It is not rigth. If cpu1 start correctly, it will be in infinite loop at addresses 0xffffff2c-0xfffffff0.

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Adventurer
Adventurer
11,371 Views
Registered: ‎03-27-2014

Re: using both CPU cores on Zynq?

Thanks for your help.

 

1. The message "CPU1 configured for standalone application" did come from arch/arm/mach-zynq/platsmp.c which was modified as per your suggestions above.

 

2. After Linux download, the value at address 0xfffffff0 was indeed 0xffffff2c. I read it a few times and it is always 0xffffff2c.

 

3. If I then write 0x30000000 to the address 0xfffffff0 then I expect CPU1 to start and update heart beat location at address 0xffff8000. But it does not and location reads 0 in Linux.

 

4. Now, when I connect JTAG cable and use XMD to debug and read the PC, then I see the different value for CPU1.

 

5. Is there a mechanism to read CPU1 PC from Linux? Because I suspect that XMD connection "stops" the CPU1 and the procedure to monitor CPU1 actually changes state and PC value potentially.

 

Finally, if I try to start CPU1 from XMD then it does start and I can see heart beat change (via XMD) but Linux stops.

XMD% con 0x30000000

XMD% stop

XMD% mrd 0xffff8000

FFFF8000: 00000011

XMD% mrd 0xffff8000

FFFF8000: 00000019

 

Not sure why I can't start CPU1 from Linux and only XMD and if I do start from XMD then Linux is flaky - sometimes stays alive and sometimes stops.

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Observer greatgehar
Observer
11,360 Views
Registered: ‎07-24-2012

Re: using both CPU cores on Zynq?

Earlier I'm also used XMD for debugging. Now for debugging by JTAG I use the next method:
1. Create debug session: chose menu Run->Debug Configurations..., in dialog window "Debug Configurations" double click on "Xilinx C/C++ application (System Debugger)", and click button "Debug" for start debugging. After start debugging you may suspend and resume each Zynq core separately.
2. Attach symbol files: after start debug session open dialog window "Debug Configurations", go to "Symbol Files" tab, click button "Add..." and point to executable file, which run on cpu1. If executable file was compiled with key -g and -O0, then you can see performing C/C++ code, else SDK show disassemble code.

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Observer greatgehar
Observer
11,358 Views
Registered: ‎07-24-2012

Re: using both CPU cores on Zynq?

1. - thanks, I forgot about it.

2. - good, it is right.

3. If after start Linux, PC register be located at addresses 0xffffff2c-0xfffffff0, then Linux start cpu1 correctly. In this case the problem in you program for cpu1. For application for cpu1 I use XAPP1078 example. It is important use modified BSP from xapp1078. Also need edit lscript.ld and change ps7_ddr_0_S_AXI_BASEADDR on 0x30000000 (Base address) - start up address for cpu1 application. This address you must write to 0xfffffff0 for start cpu1.

4. About debugging see my previous message.

5. I don't know how make it. I use Xilinx C/C++ application (System Debugger).

I attach my BSP for cpu1 application. I did this BSP myself. This BSP from ISE 14.7.

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