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so-lli1
Adventurer
Adventurer
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Registered: ‎11-26-2016

very slow psu_init

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Sourcing psu_init takes over 12 minutes to complete, then succeeds without an error. This slows down debugging quite a bit and I wonder if this is normal.

If it matters, I work with a Xilinx Zynq UltraScale+ MPSoC ZCU104 Evaluation Kit. The script is sourced from within the xSDK (2018.3) during "Debug Configuration" and the USB JTAG interface is used.

Regards,
so-lli1

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so-lli1
Adventurer
Adventurer
747 Views
Registered: ‎11-26-2016

HI @stephenm,

The board is connected to the PC using USB JTAG, Vivado is running on the local PC. No networking. I noticed that the process is significant faster if a POR is asserted before running psu_init. However, it still takes a couple of minutes which is quite a lot, but I can live with that and consider the issue resolved.

I am aware of the fact that the FSBL and the psu_init perform the same action, but the script comes in quite handy. Thank you.

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stephenm
Moderator
Moderator
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Registered: ‎09-12-2007

Are you doing this over the network, if so then this could be the issue. Yiu can use the fsbl instead.

 

So, lets assume you have something like

 

# Set up connection

connect

# Add the Microblaze PMU to target
targets -set -nocase -filter {name =~ "PSU"}
mwr 0xFFCA0038 0x1FF
# Download PMUFW to PMU
target -set -filter {name =~ "MicroBlaze PMU"}
dow zynqmp_pmufw/executable.elf
con

# Programming PL
fpga -f design_1_wrapper.bit

# Download ZYNQMP FSBL to A53 #0
targets -set -nocase -filter {name =~ "PSU"}
# write bootloop and release A53-0 reset
mwr 0xffff0000 0x14000000
mwr 0xFD1A0104 0x380E
targets -set -filter {name =~ "Cortex-A53 #0"}
dow zynqmp_fsbl/executable.elf
con
after 500
stop

 

FYI: There is a wiki here that will auto create a jtag boot script for you

https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/84444479/TCL+script+to+auto-generate+a+jtag+boot+script+based+on+HDF+file+for+Zynq+Ultrascale

 

If you have a HDF file, you can source this and use the command

build_script -hw <path to HDF> -apps zynqmp_fsbl zynqmp_pmufw

so-lli1
Adventurer
Adventurer
748 Views
Registered: ‎11-26-2016

HI @stephenm,

The board is connected to the PC using USB JTAG, Vivado is running on the local PC. No networking. I noticed that the process is significant faster if a POR is asserted before running psu_init. However, it still takes a couple of minutes which is quite a lot, but I can live with that and consider the issue resolved.

I am aware of the fact that the FSBL and the psu_init perform the same action, but the script comes in quite handy. Thank you.

View solution in original post

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