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Visitor pocero
Visitor
4,233 Views
Registered: ‎12-02-2009

xps_tft does not work when enabling cache

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I'm using XPS 11.4 to make a design that uses the xps_tft module to show output via VGA port in a Spartan 3-E Starter Kit board.

 

It works well, but when I make another project and I enable the instruction and data cache, the VGA output does not work. The screen turns on so the horizontal and vertical sync seem to work well, but the image is black.

 

The steps to create the project are exactly the same, only in the cache project I enable the cache in the BSB wizard.

 

I've debugged for example the XTftSetPixel instruction of the tft driver, and it writes a pixel in the xps_tft video memory that is set in XPS, so it seems that the xps_tft module can't read from the video memory and then show it on screen...? I don't know.

 

What could I check? In the xps_tft datasheet I haven't found any info about it. I've searched the forums with no success.

 

Thanks.

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Visitor pocero
Visitor
5,362 Views
Registered: ‎12-02-2009

Re: xps_tft does not work when enabling cache

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I finally found a solution to my problem.

 

When I enable the cache in Microblaze configuration, the memory interface gets changed so the xps_tft communication failed. So I had to add an additional PLB type port to the memory controller.

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Visitor nesaha
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4,224 Views
Registered: ‎08-24-2011

Re: xps_tft does not work when enabling cache

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It seems that the cacheable memory is shared with video memory. I found a similar case (AR#29146)about  "DMA does not work when cache is enabled". It mention the cache coherency issue and solution to avoiding the problem. Maybe it helps you.

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Visitor pocero
Visitor
4,219 Views
Registered: ‎12-02-2009

Re: xps_tft does not work when enabling cache

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I'm not using PowerPC but Microblaze. The Microblaze PDF has no reference to cache coherence.

 

There is a "flush" instruction as mentioned in AR#29146 though, so I tried it but it didn't make a difference with VGA output.

 

By reading about the cache in Microblaze reference guide, I can read that it has two working modes: write-back and write-through. The second is the default one, so I've also tested write-back but it still does not work.

 

In Microblaze configuration you can also set the cache base address and high address. Since those addresses are from the external DDR memory and also the video memory is, I've tried to set a cache memory space apart from the 2MB space needed for the video memory.

 

before:

DDR SDRAM: from 0x8C000000 to 0x8DFFFFFF

video RAM in xps_tft: from 0x8C000000, 2 MB size -> so it finishes in 0x8C200000

cache base address: 0x8C000000 cache high: 0x8DFFFFFF

 

after:

DDR SDRAM: from 0x8C000000 to 0x8FFFFFFF

video RAM in xps_tft: from 0x8C000000, 2 MB size -> so it finishes in 0x8C200000

cache base address: 0x8D000000 cache high: 0x8DFFFFFF

 

Cache was set in 4 KB for both data and instructions.

But then even the C program I made in SDK stopped working so maybe it was not a good idea...

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Visitor pocero
Visitor
5,363 Views
Registered: ‎12-02-2009

Re: xps_tft does not work when enabling cache

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I finally found a solution to my problem.

 

When I enable the cache in Microblaze configuration, the memory interface gets changed so the xps_tft communication failed. So I had to add an additional PLB type port to the memory controller.

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Visitor lpblui
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4,050 Views
Registered: ‎03-01-2012

Re: xps_tft does not work when enabling cache

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pocero, I'm interested in how you configured the additional PLB type port for your DDR_SDRAM.

 

Have you just added a new port of PLB type? Which parameters did you need to set?

 

Thank you!

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