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sbosworth
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Registered: ‎11-21-2013

10 25G Ethernet Subsystem (PMA only) device tree generation fails Vivado 2019.2

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One of our projects using a 10G Ethernet interface and targeting a Zynq ultrascale MPSOC device, seems to fail in device tree generation when running hsi::generate_target. I have extracted a section of the design, with a basic Zynq core, Vita 49 test data generator, UDP packetiser, ethernet framer, 10G MAC and the 10/25G Ethernet subsystem (PCS/PMA only) for testing and the issue still seems to occur. The issue seems related to the lack of an axi streaming interface not being present when using the Ethernet subsystem in a PCS/PMA only mode (free portion). The following string of errors is the output when running petalinux -build:

DEBUG: Executing shell function do_configure
MISC_ARG is -hdf_type xsa -yamlconf /home/dev/digitalmodules/operatingsystem/platforms/TEBF0808/build/tmp/work/plnx_zynqmp-xilinx-linux/device-tree/xilinx-v2019.2+gitAUTOINC+a8b39cf536-r0/device-tree.yaml
APP_ARG is -app "device-tree"
Using xsct from: /opt/petalinux/2019.2/tools/xsct/bin/xsct
cmd is: xsct -sdx -nodisp /home/dev/digitalmodules/operatingsystem/platforms/TEBF0808/build/tmp/work/plnx_zynqmp-xilinx-linux/device-tree/xilinx-v2019.2+gitAUTOINC+a8b39cf536-r0/dtgen.tcl -ws /home/dev/digitalmodules/operatingsystem/platforms/TEBF0808/build/../components/plnx_workspace/device-tree -pname device-tree -rp /home/dev/digitalmodules/operatingsystem/platforms/TEBF0808/build/tmp/work/plnx_zynqmp-xilinx-linux/device-tree/xilinx-v2019.2+gitAUTOINC+a8b39cf536-r0/git -processor psu_cortexa53_0 -hdf /home/dev/digitalmodules/operatingsystem/platforms/TEBF0808/build/tmp/deploy/images/plnx-zynqmp/Xilinx-plnx-zynqmp.xsa -arch 64 -app "device-tree" -hdf_type xsa -yamlconf /home/dev/digitalmodules/operatingsystem/platforms/TEBF0808/build/tmp/work/plnx_zynqmp-xilinx-linux/device-tree/xilinx-v2019.2+gitAUTOINC+a8b39cf536-r0/device-tree.yaml
INFO: [Hsi 55-2053] elapsed time for repository (/opt/petalinux/2019.2/tools/xsct/data/embeddedsw) loading 0 seconds
WARNING: not supported pl_clk:
WARNING: not supported pl_clk:
WARNING: not supported pl_clk:
WARNING: not supported pl_clk:
WARNING: not supported pl_clk:
WARNING: clock frequency for the gt_refclk_p is NULL
WARNING: not supported pl_clk:
WARNING: clock frequency for the gt_refclk_n is NULL
WARNING: Frequency 33.33333 used instead of 33.333
WARNING: psu_usb_xhci_0: No reset found
WARNING: label 'usb0' found in existing tree
WARNING: Only boolean type can have empty value. Fail to add driver(xgig_pcs_pma_0) property(axistream-connected) type(reference) value()
WARNING: Please add the property manually
WARNING: Only boolean type can have empty value. Fail to add driver(xgig_pcs_pma_0) property(axistream-control-connected) type(reference) value()
WARNING: Please add the property manually
can't read "connected_ip": no such variable
ERROR: [Hsi 55-1545] Problem running tcl command ::sw_axi_ethernet::generate : can't read "connected_ip": no such variable
while executing
"string_is_empty $connected_ip"
(procedure "::sw_axi_ethernet::generate" line 122)
invoked from within
"::sw_axi_ethernet::generate xgig_pcs_pma_0"
ERROR: [Hsi 55-1442] Error(s) while running TCL procedure generate()
generate_target failed
while executing
"error "generate_target failed""
invoked from within
"if {[catch {hsi generate_target -dir $project} res]} {
error "generate_target failed"
}"

The xgig_pcs_pma_0 block is 10/25G Ethernet Subsystem. Can anyone offer any insight as to where this error is being generated and if possible a workaround? is the HSI::generate_target function looking for the connected IP or is this a bug in a TCL script buried somewhere in Vitus, or Vivado? Given the core files are encrypted, it is difficult to trace.

Thanks

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jan_desy
Contributor
Contributor
715 Views
Registered: ‎08-22-2017

I have stumbled on the same issue when using the Ethernet PCS/PMA without the DMA (i.e. with a custom UDP/IP engine). There is an issue in the device tree generator, and here is our fix (hopefully Xilinx will merge this into the next version):

https://github.com/Xilinx/device-tree-xlnx/pull/15 

View solution in original post

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xiaogui_jack
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891 Views
Registered: ‎04-18-2019

Yes, I encountered the same problem and still do n’t know how to solve it

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sbosworth
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843 Views
Registered: ‎11-21-2013

We were able to work around this issue by choosing to "exclude interface" for the AXI control interface related to the core in the Address Editor. this means we are unable to configure the core, though as we don't need to change anything from default this appears to function as required and does not cause errors during the device tree generation. Not the best solution, but works for now.

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jan_desy
Contributor
Contributor
716 Views
Registered: ‎08-22-2017

I have stumbled on the same issue when using the Ethernet PCS/PMA without the DMA (i.e. with a custom UDP/IP engine). There is an issue in the device tree generator, and here is our fix (hopefully Xilinx will merge this into the next version):

https://github.com/Xilinx/device-tree-xlnx/pull/15 

View solution in original post

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