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fredbernadet
Contributor
Contributor
1,648 Views
Registered: ‎12-18-2012

10G Ethernet Subsystem (v3.0) : request IRQ fails

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Hello everybody,

I have implemented a 10G Ethernet Subsystem (v3.0) IP in a custom board.

I designed the FPGA with Vivado 2015.4, the Linux application with Petalinux 2015.4.

 

Problem :  the request_irq() in xilinx_axienet_open() fails with error -22

         ...

         net eth0: axienet_open()
         xilinx_axienet 40000000.ethernet: request_irq() failed, errno:-22

         ...

 

I didn't found application notes on 10G Ethernet Subsystem for Zynq device. All the available documentation is related to new "0G/25G high speed Ethernet subsystem" IP implemented on  Zynq Ultrascale (on vivado 2017.1 and later). So my design is similar to the PL_10G_Ethernet case described in XAPP1305, but I can't compare device trees, kernel config and so on.

 

Here is my PL design :

10G_xilinx.png

 

Here is my device tree :

                ETHERNET_axi_10g_ethernet_0: ethernet@40000000 {
                        axistream-connected = <&ETHERNET_axi_dma_0>;
                        axistream-control-connected = <&ETHERNET_axi_dma_0>;
                        clock-frequency = <125000000>;
                        compatible = "xlnx,ten-gig-eth-mac";
                        device_type = "network";
                        phy-mode = "BASE-R";
                        reg = <0x40000000 0x10000>;
                        xlnx = <0x0>;
                        xlnx,rxmem = <0x400>;
                        ETHERNET_axi_10g_ethernet_0_mdio: mdio {
                                #address-cells = <1>;
                                #size-cells = <0>;
                        };
                };
                ETHERNET_axi_dma_0: dma@40400000 {
                        #dma-cells = <1>;
                        compatible = "xlnx,axi-dma";
                        interrupt-parent = <&intc>;
                        interrupts = <0 36 4 0 52 4>;
                        reg = <0x40400000 0x10000>;
                        xlnx,include-sg ;
                        dma-channel@40400000 {
                                compatible = "xlnx,axi-dma-mm2s-channel";
                                interrupts = <0 36 4>;
                                xlnx,datawidth = <0x40>;
                                xlnx,device-id = <0x0>;
                                xlnx,include-dre ;
                        };
                        dma-channel@40400030 {
                                compatible = "xlnx,axi-dma-s2mm-channel";
                                interrupts = <0 52 4>;
                                xlnx,datawidth = <0x40>;
                                xlnx,device-id = <0x0>;
                                xlnx,include-dre ;
                        };
                };

 

I checked the IRQ numbers, which seems to be OK (connected to Zynq IRQ 68 and 84 in the PL)

The xilinx_axienet probe function seems to be OK.

The 10G IP is running, I can read registers from the IP reg map (known value like version ...)

 

1. Does anybody have implemented a 10G Ethernet Subsystem for a Zynq target using Petalinux?

 

2. Is the 10G Ethernet Subsystem working fine with Vivado 2015.4 / Petalinux 2015.4? Or is it mandatory to move to latest 2017.x version to make it work?

 

If anybody have some clue...

Thanks

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Accepted Solutions
fredbernadet
Contributor
Contributor
1,772 Views
Registered: ‎12-18-2012

I have fixed my IRQ issue.
I double checked my Linux Kernel config and found that Xilinx Phy setting was missing.
The correct Linux Config is the one below :

Device Drivers > Network device support > PHY Device support and infrastructure >
[ * ] Drivers for xilinx PHYs

Device Drivers > DMA Engine Support>
[   ] Xilinx AXI DMAS Engine

 

 

View solution in original post

1 Reply
fredbernadet
Contributor
Contributor
1,773 Views
Registered: ‎12-18-2012

I have fixed my IRQ issue.
I double checked my Linux Kernel config and found that Xilinx Phy setting was missing.
The correct Linux Config is the one below :

Device Drivers > Network device support > PHY Device support and infrastructure >
[ * ] Drivers for xilinx PHYs

Device Drivers > DMA Engine Support>
[   ] Xilinx AXI DMAS Engine

 

 

View solution in original post