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s002wjhw
Voyager
Voyager
4,989 Views
Registered: ‎06-26-2015

AXI BRAM write/read

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is there example c code on how to access PL Bram via axi bram controller?  I don't have to malloc, just write to the bram address?

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hpoetzl
Voyager
Voyager
7,229 Views
Registered: ‎06-24-2013

Hey @s002wjhw

 

is there example c code on how to access PL Bram via axi bram controller?

 

Something like this should work:

        int fd = open("/dev/mem", O_RDWR | O_SYNC);
        .... error checks ...        
        
        void *base = mmap(BRAM_ADDR, BRAM_SIZE,
            PROT_READ | PROT_WRITE, MAP_SHARED,
            fd, NULL);
        .... error checks ...        

I don't have to malloc, just write to the bram address?

You need to map the memory region, then you can access it like normal memory.

 

Hope this helps,

Herbert

-------------- Yes, I do this for fun!

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timduffy
Explorer
Explorer
4,986 Views
Registered: ‎04-05-2016

Are you interfacing to the BRAM controller via MicroBlaze?  if so, then yes, you just have to read/write from the address using the Xilinx helper Macros:

 

 

#include "xil_types.h"
#include "xil_io.h"
#include "xil_printf.h"

#include <inttypes.h>

#define MY_PERIPHERAL_BASE_ADDRESS 0x43000000

int main()
{
    const uint32_t value = 0xDEADBEAF;
    uint32_t response;

    xil_printf("Writing to BRAM ... ");
    Xil_32Out(MY_PERIPHERAL_BASE_ADDRESS, value);
    xil_printf("Done.\r\n);

xil_printf("Reading from BRAM ... "); response = Xil_32In(MY_PERIPHERAL_BASE_ADDRESS); xil_printf("Done.\r\n); if ( response == value ) xil_printf("SUCCESS!\r\n); else xil_printf("ERROR!!\r\n); return 0; }

 

Note: I did not compile the above code, it is intended as a reference only.

 

You can get the address of your block ram controller via the addresses tab in Vivado when the block diagram is open, or from xparameters.h, which is generated inside of the BSP that accompanies your application project in SDK.

 

 

 

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hpoetzl
Voyager
Voyager
7,230 Views
Registered: ‎06-24-2013

Hey @s002wjhw

 

is there example c code on how to access PL Bram via axi bram controller?

 

Something like this should work:

        int fd = open("/dev/mem", O_RDWR | O_SYNC);
        .... error checks ...        
        
        void *base = mmap(BRAM_ADDR, BRAM_SIZE,
            PROT_READ | PROT_WRITE, MAP_SHARED,
            fd, NULL);
        .... error checks ...        

I don't have to malloc, just write to the bram address?

You need to map the memory region, then you can access it like normal memory.

 

Hope this helps,

Herbert

-------------- Yes, I do this for fun!

View solution in original post

s002wjhw
Voyager
Voyager
4,962 Views
Registered: ‎06-26-2015
yep gotta it working.

if I have axi_dma, how do I access it? this is on zynq petalinux
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stephenm
Xilinx Employee
Xilinx Employee
4,897 Views
Registered: ‎09-12-2007
curious
Newbie
Newbie
2,497 Views
Registered: ‎09-17-2018

Hi Hey @s002wjhw,

We tried using mmap.

Code runs without any error, but I do not see any change in LUT values (in fact it is always 0).

I am not sure, what I might be doing wrong. Do you have any suggestions as you seem more experienced than I.

 

Many thanks,

 

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sravyabolapati
Visitor
Visitor
1,241 Views
Registered: ‎07-26-2019

Hi,

Even Iam also using mmap. Can you give me the command for direct compilation of .cpp on zcu102 board. 

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