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Contributor
Contributor
61,126 Views
Registered: ‎04-28-2014

AXI DMA with Zynq Running Linux

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Hello Dear All,

 

I would like to use AXI DMA in order to pass data to my custom ip. I think it is not a hard job for bare metal applications(an example tutorial: http://www.fpgadeveloper.com/2014/08/using-the-axi-dma-in-vivado.html) however, I couldn't find any complete guide to use AXI DMA in Linux. I am trying to put pieces together but I couldn't do what I want so far.

 

Would you please help me with that, do you have any suggestion or do you know any sources related to this subject?

 

Thanks,

1 Solution

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Xilinx Employee
Xilinx Employee
94,198 Views
Registered: ‎09-10-2008

Re: AXI DMA with Zynq Running Linux

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Hi,

 

I've been doing some work in this area so I attached a pdf and some source code.  DMA in Linux is not that well documented IMHO.  There are some other threads with these same files attached. 

 

Thanks,

John

62 Replies
Xilinx Employee
Xilinx Employee
61,108 Views
Registered: ‎10-24-2013

Re: AXI DMA with Zynq Running Linux

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Hi,
Moving to Embedded linux board.
Thanks,Vijay
--------------------------------------------------------------------------------------------
Please mark the post as an answer "Accept as solution" in case it helped resolve your query.
Give kudos in case a post in case it guided to the solution.
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Xilinx Employee
Xilinx Employee
94,199 Views
Registered: ‎09-10-2008

Re: AXI DMA with Zynq Running Linux

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Hi,

 

I've been doing some work in this area so I attached a pdf and some source code.  DMA in Linux is not that well documented IMHO.  There are some other threads with these same files attached. 

 

Thanks,

John

Contributor
Contributor
61,068 Views
Registered: ‎04-28-2014

Re: AXI DMA with Zynq Running Linux

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Awesome! This is what I was looking for. Thank you very much!

 

Is this presentation from a workshop/lecture series? I mean, If there are some smilar presentations, I would like to get them also.

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Xilinx Employee
Xilinx Employee
61,043 Views
Registered: ‎09-10-2008

Re: AXI DMA with Zynq Running Linux

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http://forums.xilinx.com/t5/Embedded-Linux/mmap-problems-device-tree-problem/td-p/523043

 

This thread has more posted and we are going to make a lot of this stuff more public in the future.

 

Glad you liked it.  I also attached a new one that I'm just finishing for user space DMA.  I'm putting this out here hoping that some of you will start using the methods and give some feedback.

 

Thanks

John

 

 

Tags (1)
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Contributor
Contributor
61,027 Views
Registered: ‎04-28-2014

Re: AXI DMA with Zynq Running Linux

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Looking forward to see for more in the future. I see a lot of questions about DMA but there are not enough resources, I think. Now, I feel like I found a treat. 

 

Thanks for helping. Have a great day!

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Visitor cemalakarsu
Visitor
60,949 Views
Registered: ‎03-23-2010

Re: AXI DMA with Zynq Running Linux

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Hello probus;

 

I am working on AXI DMA on petalinux and when i modprobe xilinx_axidma.c i always get the error : 

 

Unhandled fault: imprecise external abort (0x406) at 0x000a58a7
Internal error: : 406 [#1] PREEMPT SMP ARM

 

as far as i understandi get an error at dma_reset function which try to read the control_register. So i couldnot reach the registers. But, when i check the /proc/iomem, system handle the correct register addresses.

 

root@Xilinx-ZC702-2013_3:~# cat /proc/iomem
00000000-1fffffff : System RAM
00008000-00522053 : Kernel code
00c80000-00ccec2f : Kernel data
40400000-4040ffff : /amba@0/axidma@40400000
e0001000-e0001ffe : xuartps
e0002000-e0002fff : /amba@0/ps7-usb@e0002000
e0002000-e0002fff : e0002000.ps7-usb
e000a000-e000afff : e000a000.ps7-gpio
e000d000-e000dfff : e000d000.ps7-qspi
e0100000-e0100fff : mmc0
f8003000-f8003fff : /amba@0/ps7-dma@f8003000
f8003000-f8003fff : dma-pl330
f8007000-f80070ff : xdevcfg
f8007100-f800711f : f8007100.ps7-xadc
root@Xilinx-ZC702-2013_3:~#

 

 

So do you have an idea what could be the problem. I also added the system.dts.

 

Best Regards

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Participant maximilianpohl
Participant
58,395 Views
Registered: ‎09-02-2014

Re: AXI DMA with Zynq Running Linux

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Hello,

i started a few days ago to move my simple DMA implementation from standalone to linux.
this is the first "usefull" thread i found about this step. Is there also a lab discription or example code for

the hardware design which is described in this documentation from linnj.

 

at the moment i dont know how and where i should start.

 

thank you

 

Max

 

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Explorer
Explorer
58,382 Views
Registered: ‎03-13-2014

Re: AXI DMA with Zynq Running Linux

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Hi,

 

Just to comment a little. As a Linux newbe I have been working on DMA device drivers for a few months now. I started just using everything in user space. I reserved the DMA buffers as a memory hole (memory linux did not touch). things such as the AXI DMA registers and the buffers were mapped to user space using device /dev/mem mmap. I did not use interrupts. I had everthing working, however there was a big problem, it was too slow. Copy from user space to DMA buffers was very slow. I am sure clever people who understand caching etc could tell you why but suffice to say don't use a user space only DMA.

 

I have now written my own char device driver, I ignore the Linux and Xilinx DMA drivers and program the AXI DMA directly. This works fine, if it will help anyone I attach the source.

 

good luck

 

Dave

 

P.S. Thanks to John Linn who was very helpful when I had problems

 

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Xilinx Employee
Xilinx Employee
58,371 Views
Registered: ‎09-10-2008

Re: AXI DMA with Zynq Running Linux

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Hi Max and Dave,

 

Dave, based on your small description, the only reason I can think of for it being slow was used /dev/mem to map buffers to user space such that they were maybe cached.  It takes CPU time to do the cache operations.  

 

I believe that a user/kernel space hybrid approach is likely best and I think you should be able to map the buffers into user space without sacrificing performance. The kernel space lets you use interrupts more effectively and control buffers with respect to caching also.  Allocating non-cached memory for buffers (dma_alloc_coherent) may be the best answer to avoid cache issues (depending on the application).  

 

I see a lot of people trying user space stuff only without wanting to get into the kernel. Knowing more details about what the kernel is doing is a big benefit and likely a requirement even when doing user space code for devices like this.

 

Max, the systems I used in the past were built in Vivado and were extremely simple. An AXI DMA connected to Zynq using the interrupts and then a loopback from the Tx stream to the Rx stream on the DMA.  My work has been more focused on using the Linux DMA drivers since they are provided and work.

 

Thanks

John

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Xilinx Employee
Xilinx Employee
25,128 Views
Registered: ‎09-10-2008

Re: AXI DMA with Zynq Running Linux

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Hi Max,

Sorry I misread, you're looking for the code examples. I thought I attached to a thread, I'll have a look.

John
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Xilinx Employee
Xilinx Employee
25,124 Views
Registered: ‎09-10-2008

Re: AXI DMA with Zynq Running Linux

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Max, yes the code is on other threads. You can filter threads by which have attachments which helps.

http://forums.xilinx.com/t5/Embedded-Linux/AXI-DMA-with-Zynq-Running-Linux/m-p/523105#M10658
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Participant maximilianpohl
Participant
25,116 Views
Registered: ‎09-02-2014

Re: AXI DMA with Zynq Running Linux

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Hi John, Hi Dave,

thank you for your answers.

 

I'm new to this linux stuff and this was my first time i saw a kernel driver(modul) in real life :)

 

A few words to my application:
It's a measuring device which collects data's from external devices via LVDS interface (into pl).

These data's are manipulatet in the pl and then transfered to the linux system. The linux finally send this datas over a ethernet socket to a storage device, or via CAN (at slower data rates).

 

First we tried a own pl-ps interface via axi-gpio (axi-light) IP-cores, but this was much to slow. So we decided to use a DMA-IP implementation.
I did some performance tests with a simple standalone application (AXI-Traffic-Generator -> AXI-DMA -> PS), which was very easy. The linux solutions all look very complicated, i think thats the reason why so many people (like me) try to avoid kernel drivers. 

 

how can i realize my described application with a kernel driver/module? and how can i access these datas from userspace from that kind of solution to send them via ethernet or can?

 

thank you very much

 

Max

 

 

 

 

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Xilinx Employee
Xilinx Employee
25,108 Views
Registered: ‎09-10-2008

Re: AXI DMA with Zynq Running Linux

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Hi Max,

Since you are new to Linux that's a lot of work while learning embedded Linux. That's why many don't want to do kernel work as they are new to it and a have a lot to learn before being able to to be productive.

Here's another idea to consider.

We have a new product that is targeted to software developers called SDSOC and it does a lot of the stuff for you to help with data transport as you are needing. It provides the kernel drivers and allows you access to the data in user space thru some custom APIs.

http://www.xilinx.com/products/design-tools/sdx/sdsoc.html

Thanks
John
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Explorer
Explorer
25,100 Views
Registered: ‎03-13-2014

Re: AXI DMA with Zynq Running Linux

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Max,

 

From what you say you need Linux would be very good. Sending data over a TCP socket you can do, very easy just google for examples. I have not used the CAN bus driver but that should not difficult either. I think what John describes would be good as well, a general purpose DMA driver where user space can map in kernel buffers and start DMA with ioctrl(). But it was not around when I started.

 

The example driver I posted was MM2S so wrong way for you, however maybe it gives you an idea.

 

Question for John - Can you post some example user applications and the driver you made?

 

regards

 

Dave

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24,717 Views
Registered: ‎01-16-2014

Re: AXI DMA with Zynq Running Linux

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Hello John,

I have tried using your axidma.c.golden with the latest device tree and kernel release. I am having the same PL logic as indicated in your presentation. The HP0 bus is 64 bit, the stream is 64 bit and is looped backed. I am using Vidado 2014.4

I am selecting the offset as 0x00000000 with 4M range. the dma engine is without SG, no DRE, burst size is 16

 

However I am getting the following dmesg listing. Here I suspect the there is some issue when the dma0chan0 is shown to be busy. The status register content seems to be 41, i guess it is signalling the address decode error by the datamover. I wonder where in the dts does the address assigned in address editor to S_AXI_HP0 with Basename as HP0_DDR_LOWOCM gets reflected.

 

dmesg listing:

AXI DMA module initialized
dmaengine: __dma_request_channel: success (dma0chan0)
dmaengine: private_candidate: dma0chan0 busy
dmaengine: __dma_request_channel: success (dma0chan1)
Starting DMA transfers Waiting for DMA to complete...
xilinx-dma 40400000.dma: Channel 7e1d7c50 has errors 41, cdr 0 tdr 0
DMA transfer failure
DMA bytes sent: 32768
xilinx-dma 40400000.dma: Free all channel resources.
xilinx-dma 40400000.dma: Free all channel resources.

Even the kernel axidmatest module is failing with the similar error and is getting timed out.

 

 

dmatest: match is 100001
dmatest: Private is 100001
dmaengine: __dma_request_channel: success (dma0chan0)
dmatest: Found tx device
dmaengine: private_candidate: dma0chan0 busy
dmatest: Private is 100002
dmaengine: __dma_request_channel: success (dma0chan1)
dmatest: Found rx device
dmatest: Started 1 threads using dma0chan0 dma0chan1
xilinx-dma 40400000.dma: Channel 7d8e8590 has errors 41, cdr 0 tdr 0
dma0chan0-dma0c: #0: tx got completion callback, 
but status is 'in progress'
dma0chan0-dma0c: #1: tx test timed out
xilinx-dma 40400000.dma: Channel 7d8e8590 has errors 41, cdr 0 tdr 0
dma0chan0-dma0c: #2: tx test timed out
xilinx-dma 40400000.dma: Channel 7d8e8590 has errors 41, cdr 0 tdr 0
dma0chan0-dma0c: #3: tx test timed out
xilinx-dma 40400000.dma: Channel 7d8e8590 has errors 41, cdr 0 tdr 0
dma0chan0-dma0c: #4: tx test timed out
dma0chan0-dma0c: terminating after 5 tests, 5 failures (status 0)
dmatest: match is 10100001
dmaengine: private_candidate: dma0chan0 busy
dmaengine: private_candidate: dma0chan1 busy
dmaengine: __dma_request_channel: fail ((null))
dmatest: No more tx channels available
dmaengine: private_candidate: dma0chan0 busy
dmaengine: private_candidate: dma0chan1 busy
dmaengine: __dma_request_channel: fail ((null))
dmatest: No more rx channels available

The same firmware is functioning is standalone mode. I am an average linux programmer. your pointers in this matter will be very helpful.

 

Thank you in advance

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24,519 Views
Registered: ‎12-29-2014

Re: AXI DMA with Zynq Running Linux

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Hi,

  Is this working now, Could you please let me know the procedure to test. I am also trying to  access the axi-dma on HP3 port,

 

Thanks

Ramprasad

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24,518 Views
Registered: ‎12-29-2014

Re: AXI DMA with Zynq Running Linux

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Hi,

  Could you please share me the user space application and devicetree for the same.

 

 

Thanks

Ramprasad

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Adventurer
Adventurer
24,499 Views
Registered: ‎09-30-2014

Re: AXI DMA with Zynq Running Linux

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linnj,

 

Everything makes sense except for one thing.  You example is designed is designed to run as a module, correct?  Can you take that same code and just use it in a user application?

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Visitor manigjack
Visitor
24,267 Views
Registered: ‎10-27-2014

Re: AXI DMA with Zynq Running Linux

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@kuldeepoppila @linnj

 

Hello both,

 

I am currently on the axi-dma driver and of course facing the same issue with tx timed out with the axidmatest.c code provided in the xillinux kernel....

 

Could you please let me know if this is resolved???

 

 

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Visitor gerald1010
Visitor
19,400 Views
Registered: ‎02-13-2015

Re: AXI DMA with Zynq Running Linux

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hi,

 

im using mmap on linux. has dma a better performance than the mmap approach?

 

Thanks,

G

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Visitor gpsat
Visitor
18,937 Views
Registered: ‎11-20-2014

Re: AXI DMA with Zynq Running Linux

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SDSoC appears to be awesome, but it only handles a very specific use case: C++ -> PL -> C++.

 

My usecase is PL -> C++ (then another run to the PL and back, but that works easily with SDSoC). I find it hard to believe there isn't a single worked example of getting data generated in the PL out in an efficient manner. I've been a native Linux desktop user for 10+ years, developing applications for userspace embedded linux for 8+ years and all the resources that have been pointed to don't make it obvious how to actually get a working solution.

 

Isn't this a substantial piece in the puzzle of using these SOC parts effectively?

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Scholar milosoftware
Scholar
18,904 Views
Registered: ‎10-26-2012

Re: AXI DMA with Zynq Running Linux

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The Linux "Industrial IO" framework does exactly that. Offers DMA transfers in both memory mapped or just file-like modes.

 

For more control on the data flow, you could look at Dyplo, which targets both use-cases efficiently.

 

And as extra options, you can always make ths system believe that you have an audio or video capture device. The audio interface works quite nicely for data aquisition as well, I've alread had it handle 16 channels of 24-bit data at 50kHz. Nothing in that interface prevents you from capturing at 200MHz...

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18,446 Views
Registered: ‎11-25-2015

Re: AXI DMA with Zynq Running Linux

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Hi all ,

    I am trying to transfer the data from PL to PS accroding the AXI dma,but I didn't know how to do that.

so I download the Release 2014.03 SDImage and the axidma.c.golden.

    When I insmod the axidma_golden.ko to the kernel,the log show that:"DMA timed out
DMA transfer failure" .Do you know what's that?

 

If you konw How to do that how to transfer the data from Pl to ps ,please get me known

  thanks.

Email:hu3692@163.com

QQ:306179843

 

 

  thanks .

Xilinx Employee
Xilinx Employee
18,439 Views
Registered: ‎09-10-2008

Re: AXI DMA with Zynq Running Linux

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Hi,

 

Have you gone thru the presentations (PPT) that have been posted in this forum and out on the web for DMA?

 

http://www.xilinx.com/training/zynq/

 

Thanks

John

Visitor schnegg
Visitor
15,973 Views
Registered: ‎04-10-2016

Re: AXI DMA with Zynq Running Linux

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Hello,

 

I'm trying to run the dmatest module but my kernel panics when booting:

 

xilinx-dma 40400000.dma: reset timeout, cr 4, sr 0
xilinx-dma 40400000.dma: Reset channel failed
xilinx-dma 40400000.dma: Probing channels failed
Unable to handle kernel NULL pointer dereference at virtual address 00000004
pgd = c0004000
[00000004] *pgd=00000000
Internal error: Oops - BUG: 817 [#1] PREEMPT SMP ARM
Modules linked in:
CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.0.0-xilinx #16
Hardware name: Xilinx Zynq Platform
task: de42b9c0 ti: de44a000 task.ti: de44a000
PC is at xilinx_dma_chan_remove+0x64/0x8c
LR is at xilinx_dma_chan_remove+0x5c/0x8c
pc : [<c0214f5c>]    lr : [<c0214f54>]    psr: 600d0013
sp : de44be40  ip : 00000000  fp : 00000000
r10: de4c92a0  r9 : debed0f8  r8 : de4c8010
r7 : debed2d4  r6 : 00000000  r5 : e08e0000  r4 : de6c0e90
r3 : 00000000  r2 : 00000000  r1 : de6c0f10  r0 : 00000000
Flags: nZCv  IRQs on  FIQs on  Mode SVC_32  ISA ARM  Segment kernel
Control: 18c5387d  Table: 1d50404a  DAC: 00000015
Process swapper/0 (pid: 1, stack limit = 0xde44a210)
Stack: (0xde44be40 to 0xde44c000)
be40: de4c9290 de6c0e90 fffffff0 c02159f0 de73b128 c05da103 de4cbf88 00000020
be60: c09dda80 ffffffed de4c8010 c09b803c c09b803c 00000000 c09dda80 c0683f94
be80: 00000000 c027066c de4c8010 c0a050e0 00000000 c026f224 de4c8010 de4c8044
bea0: c09b803c c09bccb0 c09ab560 c026f410 00000000 c09b803c c026f3a8 c026db44
bec0: de49df5c de4e64b4 c09b803c 00000000 de59ae80 c026eadc c05c3368 c05c3370
bee0: 00000000 c09b803c c066f0b8 00000000 c09ab560 c026f914 00000000 de65dc00
bf00: c066f0b8 c00089e0 c048ff80 de499c00 c0486584 c09e45f8 c0683f00 c00fd0c8
bf20: c05a8022 de499e80 c09ae8a4 60000113 000000a9 defffe09 00000000 c0035b60
bf40: 000000aa 00000006 00000006 000000a9 c09ae88c 00000006 000000aa 00000006
bf60: 000000aa c0689d58 c0683f8c c09dda80 c09dda80 c0658d3c 00000006 00000006
bf80: c06584fc de44a000 00000000 c04787b8 00000000 00000000 00000000 00000000
bfa0: 00000000 c04787c0 00000000 c000de40 00000000 00000000 00000000 00000000
bfc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
bfe0: 00000000 00000000 00000000 00000000 00000013 00000000 ddefddff 7fff5cd3
[<c0214f5c>] (xilinx_dma_chan_remove) from [<c02159f0>] (xilinx_dma_probe+0x36c/0x3e4)
[<c02159f0>] (xilinx_dma_probe) from [<c027066c>] (platform_drv_probe+0x48/0x98)
[<c027066c>] (platform_drv_probe) from [<c026f224>] (driver_probe_device+0x98/0x1d8)
[<c026f224>] (driver_probe_device) from [<c026f410>] (__driver_attach+0x68/0x8c)
[<c026f410>] (__driver_attach) from [<c026db44>] (bus_for_each_dev+0x6c/0x90)
[<c026db44>] (bus_for_each_dev) from [<c026eadc>] (bus_add_driver+0xdc/0x1c4)
[<c026eadc>] (bus_add_driver) from [<c026f914>] (driver_register+0x8c/0xd0)
[<c026f914>] (driver_register) from [<c00089e0>] (do_one_initcall+0x100/0x180)
[<c00089e0>] (do_one_initcall) from [<c0658d3c>] (kernel_init_freeable+0x110/0x1d4)
[<c0658d3c>] (kernel_init_freeable) from [<c04787c0>] (kernel_init+0x8/0xe4)
[<c04787c0>] (kernel_init) from [<c000de40>] (ret_from_fork+0x14/0x34)
Code: e284007c ebf8399d e5943048 e5942044 (e5823004)
---[ end trace 1f6dc0c03434ac4f ]---
Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b

CPU1: stopping
CPU: 1 PID: 0 Comm: swapper/1 Tainted: G      D         4.0.0-xilinx #16
Hardware name: Xilinx Zynq Platform
[<c001490c>] (unwind_backtrace) from [<c0010e4c>] (show_stack+0x10/0x14)
[<c0010e4c>] (show_stack) from [<c047bcf0>] (dump_stack+0x80/0xcc)
[<c047bcf0>] (dump_stack) from [<c00132e8>] (ipi_cpu_stop+0x3c/0x6c)
[<c00132e8>] (ipi_cpu_stop) from [<c00138d0>] (handle_IPI+0x64/0x84)
[<c00138d0>] (handle_IPI) from [<c0008628>] (gic_handle_irq+0x54/0x5c)
[<c0008628>] (gic_handle_irq) from [<c0011800>] (__irq_svc+0x40/0x74)
Exception stack(0xde469f90 to 0xde469fd8)
9f80:                                     00000001 00000000 00000000 c001cba0
9fa0: 00000000 de468000 00000000 c09ddd9c de469fe0 00000001 00000000 c048381c
9fc0: 00000000 de469fd8 c000e8d4 c000e8d8 60000113 ffffffff
[<c0011800>] (__irq_svc) from [<c000e8d8>] (arch_cpu_idle+0x2c/0x38)
[<c000e8d8>] (arch_cpu_idle) from [<c004933c>] (cpu_startup_entry+0x234/0x268)
[<c004933c>] (cpu_startup_entry) from [<000086c4>] (0x86c4)
---[ end Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b

 

Here is my block diagram:

 

wiring.PNG

And my dts file (generated by Petalinux):

/*
 * CAUTION: This file is automatically generated by Xilinx.
 * Version: HSI 2015.4
 * Today is: Sat Apr  9 23:10:07 2016
*/


/ {
	amba_pl: amba_pl {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "simple-bus";
		ranges ;
		axi_dma_0: dma@40400000 {
			#dma-cells = <1>;
			compatible = "xlnx,axi-dma-1.00.a";
			interrupt-parent = <&intc>;
			interrupts = <0 29 4 0 30 4>;
			reg = <0x40400000 0x10000>;
			xlnx,include-sg ;
			dma-channel@40400000 {
				compatible = "xlnx,axi-dma-mm2s-channel";
				interrupts = <0 29 4>;
				xlnx,datawidth = <0x20>;
				xlnx,device-id = <0x0>;
			};
			dma-channel@40400030 {
				compatible = "xlnx,axi-dma-s2mm-channel";
				interrupts = <0 30 4>;
				xlnx,datawidth = <0x20>;
				xlnx,device-id = <0x0>;
			};
		};
	};
};

Since it's a reset error, I think I have made a mistake somewhere. Can you help me find it ?

 

I use Vivado 2015.4 and Petalinux 2015.4.

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Visitor schnegg
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Registered: ‎04-10-2016

Re: AXI DMA with Zynq Running Linux

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Everything was fine except one little mistake in a command line.
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14,733 Views
Registered: ‎07-07-2016

Re: AXI DMA with Zynq Running Linux

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Hi zhudouhuifei

 

I have the same problem as you. "DMA timed out DMA transfer failure". Do you know how to solve it?

Thanks

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Visitor schnegg
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Re: AXI DMA with Zynq Running Linux

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In the command petalinux-package, I was using the FSBL that I've created with the SDK. Instead one must use the one created by Petalinux.

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Registered: ‎07-07-2016

Re: AXI DMA with Zynq Running Linux

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Hi schnneg.

I don't understand , is the problem the fsbl.elf generated form petalinux??. I'm using axidma.c.golden as a driver to control an axi_dma in the fpga part (PL). This driver was uploaded to this forum by linng in 2008. I read that some of you have had some problems using it, and the message "dma timeout" appears when this driver is loaded. Now I'm in this point. I'm debugging this driver because what i receive is different from what i sent. It seems like the receiver buffer was mapped on a wrong address, because the data i receive looks like strings containing a paths of linux and a lot of zero bytes, too

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Basically I'm trying to learn how to control a axi dma in the pl part from the ps part using linux but I haven't found any working driver to do this yet.

¿any help?

 

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