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badFITimage
Explorer
Explorer
810 Views
Registered: ‎09-06-2019

AXI Interrupt Controller IRQ note registering as GIC periph in Linux

Hi, I have a simple design to test an external active low edge triggered interrupt. The signal is connect to an instance of the AXI INTC block in the following way:

Capture.PNG

With the following device tree:

 

/ {
	amba_pl: amba_pl@0 {
		#address-cells = <2>;
		#size-cells = <2>;
		compatible = "simple-bus";
		ranges ;
		gpio_1553: gpio@a0000000 {
			#gpio-cells = <3>;
			#interrupt-cells = <2>;
			clock-names = "s_axi_aclk";
			clocks = <&zynqmp_clk 71>;
			compatible = "xlnx,axi-gpio-2.0", "xlnx,xps-gpio-1.00.a";
			gpio-controller ;
			interrupt-controller ;
			interrupt-names = "ip2intc_irpt";
			interrupt-parent = <&axi_intc_0>;
			interrupts = <1 2>;
			reg = <0x0 0xa0000000 0x0 0x1000>;
			xlnx,all-inputs = <0x0>;
			xlnx,all-inputs-2 = <0x0>;
			xlnx,all-outputs = <0x0>;
			xlnx,all-outputs-2 = <0x0>;
			xlnx,dout-default = <0x00000000>;
			xlnx,dout-default-2 = <0x00000000>;
			xlnx,gpio-width = <0x1>;
			xlnx,gpio2-width = <0x20>;
			xlnx,interrupt-present = <0x1>;
			xlnx,is-dual = <0x0>;
			xlnx,tri-default = <0xFFFFFFFF>;
			xlnx,tri-default-2 = <0xFFFFFFFF>;
		};
		psu_ctrl_ipi: PERIPHERAL@ff380000 {
			/* This is a place holder node for a custom IP, user may need to update the entries */
			compatible = "xlnx,PERIPHERAL-1.0";
			reg = <0x0 0xff380000 0x0 0x80000>;
		};
		psu_message_buffers: PERIPHERAL@ff990000 {
			/* This is a place holder node for a custom IP, user may need to update the entries */
			compatible = "xlnx,PERIPHERAL-1.0";
			reg = <0x0 0xff990000 0x0 0x10000>;
		};
		axi_intc_0: interrupt-controller@a0001000 {
			#interrupt-cells = <2>;
			clock-names = "s_axi_aclk";
			clocks = <&zynqmp_clk 71>;
			compatible = "xlnx,axi-intc-4.1", "xlnx,xps-intc-1.00.a";
			interrupt-controller ;
			interrupt-parent = <&gic>;
			interrupts = <0 89 4>;
			reg = <0x0 0xa0001000 0x0 0x1000>;
			xlnx,kind-of-intr = <0x3>;
			xlnx,num-intr-inputs = <0x2>;
		};
	};
};
&spi1 {
	status = "okay";
	num-cs = <1>;
	label = "MY-SPI-DEVICE";
	is-decoded-cs = <0>;

	hi6131_0: hi6131@0 {
		compatible="poc,hi6131";
		reg = <0>;
		spi-max-frequency = <20000000>;
		
		/* Interrupt Parent Set to AXI INTC */
		interrupt-parent = <&axi_intc_0>;
		interrupt = <0 2>;
	};
};

Upon kernel boot, the intc driver is probed and results in:

 

irq-xilinx: /amba_pl@0/interrupt-controller@a0001000: num_irq=2, edge=0x3
...
[    2.488148] No set_type function for IRQ 48 (interrupt-controller@a0001000)

But results in no AXI INTC periph registering as a GIC device.

 

 

# cat /proc/interrupts
           CPU0       CPU1       CPU2       CPU3
  0:          0          0          0          0     xgpio   0 Edge      hi6131Int
  4:       1765       1742       1594       1582     GICv2  30 Level     arch_timer
  7:          0          0          0          0     GICv2  67 Level     zynqmp_ipi
  8:          0          0          0          0     GICv2 175 Level     arm-pmu
  9:          0          0          0          0     GICv2 176 Level     arm-pmu
 10:          0          0          0          0     GICv2 177 Level     arm-pmu
 11:          0          0          0          0     GICv2 178 Level     arm-pmu
 12:          0          0          0          0     GICv2 155 Level     axi-pmon, axi-pmon
 13:          0          0          0          0     GICv2 156 Level     zynqmp-dma
 14:          0          0          0          0     GICv2 157 Level     zynqmp-dma
 15:          0          0          0          0     GICv2 158 Level     zynqmp-dma
 16:          0          0          0          0     GICv2 159 Level     zynqmp-dma
 17:          0          0          0          0     GICv2 160 Level     zynqmp-dma
 18:          0          0          0          0     GICv2 161 Level     zynqmp-dma
 19:          0          0          0          0     GICv2 162 Level     zynqmp-dma
 20:          0          0          0          0     GICv2 163 Level     zynqmp-dma
 22:          0          0          0          0     GICv2 109 Level     zynqmp-dma
 23:          0          0          0          0     GICv2 110 Level     zynqmp-dma
 24:          0          0          0          0     GICv2 111 Level     zynqmp-dma
 25:          0          0          0          0     GICv2 112 Level     zynqmp-dma
 26:          0          0          0          0     GICv2 113 Level     zynqmp-dma
 27:          0          0          0          0     GICv2 114 Level     zynqmp-dma
 28:          0          0          0          0     GICv2 115 Level     zynqmp-dma
 29:          0          0          0          0     GICv2 116 Level     zynqmp-dma
 31:          0          0          0          0     GICv2  93 Level     eth0, eth0
 33:        122          0          0          0     GICv2  49 Level     cdns-i2c
 34:          0          0          0          0     GICv2  50 Level     cdns-i2c
 35:          0          0          0          0     GICv2  42 Level     ff960000.memory-controller
 36:          0          0          0          0     GICv2  57 Level     axi-pmon, axi-pmon
 37:          0          0          0          0     GICv2  47 Level     ff0f0000.spi
 38:          0          0          0          0     GICv2  58 Level     ffa60000.rtc
 39:          0          0          0          0     GICv2  59 Level     ffa60000.rtc
 40:         86          0          0          0     GICv2  81 Level     mmc0
 41:          0          0          0          0     GICv2  51 Level     ff040000.spi
 42:       1232          0          0          0     GICv2  52 Level     ff050000.spi
 43:        176          0          0          0     GICv2  53 Level     xuartps
 46:          0          0          0          0     GICv2  84 Edge      ff150000.watchdog
 47:          0          0          0          0     GICv2  88 Level     ams-irq
IPI0:       568       2160        344       2336       Rescheduling interrupts
IPI1:         3          5          1          5       Function call interrupts
IPI2:         0          0          0          0       CPU stop interrupts
IPI3:         0          0          0          0       CPU stop (for crash dump) interrupts
IPI4:         0          0          0          0       Timer broadcast interrupts
IPI5:         0          0          0          0       IRQ work interrupts
IPI6:         0          0          0          0       CPU wake-up interrupts
Err:          0

 

 

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2 Replies
jkarch1948
Observer
Observer
615 Views
Registered: ‎01-17-2020

Did you ever find out what interrupt-parent and interrupt settings work for your AXI GPIO device?

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badFITimage
Explorer
Explorer
595 Views
Registered: ‎09-06-2019

The device tree parameters ended up being correct and worked. The issue was with how we were handling the irq in our custom driver.

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