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Visitor
Visitor
1,968 Views
Registered: ‎11-30-2017

Access SPI register via /dev/mem

Hi,

 

I'm using MicroZed board, and try to read/write SPI registers via /dev/mem. First of all, I enabled SPI-related option in Linux kernel and update the device tree below:

&spi0 {
        status = "okay";
        is-decoded-cs = <0>;
        num-cs = <1>;
        spidev@0 {
                compatible = "linux,spidev";
                reg = <0>;
                spi-max-frequency = <0x4c4b40>;
        };
};

 

And when Linux boots up, /dev/spidev1.0 appears. I know the base physical address is 0xE0006000, and I read/write the register directly via /dev/mem. Actually, I'm using a tool: devmem2.

 

However, each time when I use devmem2 to write data to SPI registers, the value read back is always zero, like below:

 

root@xxxxxx:~# devmem2 0xe0006000 w 0x27e19
        /dev/mem opened.
        Memory mapped at address 0xb6fda000.
        Value at address 0xE0006000 (0xb6fda000): 0x0
        Written 0x27E19; readback 0x27E19

 

root@xxxxxx:~# devmem2 0xe0006000
        /dev/mem opened.
        Memory mapped at address 0xb6eff000.
        Value at address 0xE0006000 (0xb6eff000): 0x0

 

I'm confused about this issue and get no idea of how to fix it.  Any help or suggestions are appreciated. Thanks a lot.

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5 Replies
Visitor
Visitor
1,885 Views
Registered: ‎11-30-2017

I still get this issue unfixed. Trying to access SPI register with /dev/mem, but always read 0 back. Here is my steps:

 

a) I use Vivado to create hardware design based on MicroZed board, and only add SPI0 and SPI1. It seems EMIO is used for SPI0 and MIO for SPI1. After that, I just sync, implementation, and generate bitstream and HDF file.

 

b) I import HDF into Petalinux, and enable the following SPI configuration in kernel:

        Cadence SPI Controller

        Xilinx SPI controller common module

        Xilinx Zynq QSPI controller

        User mode SPI device driver support

 

c) Then, run petalinux-build, and finally my device tree for SPI is like this:

                spi@e0006000 {
                        compatible = "xlnx,zynq-spi-r1p6";
                        reg = <0xe0006000 0x1000>;
                        status = "okay";
                        interrupt-parent = <0x4>;
                        interrupts = <0x0 0x1a 0x4>;
                        clocks = <0x1 0x19 0x1 0x22>;
                        clock-names = "ref_clk", "pclk";
                        #address-cells = <0x1>;
                        #size-cells = <0x0>;
                        is-decoded-cs = <0x0>;
                        num-cs = <0x1>;
                        #num-chip-select = <0x1>;
                        #xlnx,has-ss0 = <0x1>;
                        #xlnx,spi-clk-freq-hz = <0x5f5e100>;

                        spidev@0 {
                                compatible = "spidev";
                                reg = <0x0>;
                                spi-max-frequency = <0x2faf080>;
                        };
                };

                spi@e0007000 {
                        compatible = "xlnx,zynq-spi-r1p6";
                        reg = <0xe0007000 0x1000>;
                        status = "okay";
                        interrupt-parent = <0x4>;
                        interrupts = <0x0 0x31 0x4>;
                        clocks = <0x1 0x1a 0x1 0x23>;
                        clock-names = "ref_clk", "pclk";
                        #address-cells = <0x1>;
                        #size-cells = <0x0>;
                        is-decoded-cs = <0x0>;
                        num-cs = <0x1>;
                };

 

d) I copy BOOT.BIN and image.ub to MicroZed board, and run. Finally, I can see "/dev/spidev1.0". This is for SPI0. At this time, I use devmem2 to read/write both SPI0 and SPI1, the physical address is 0xe0006000 and 0xe0007000. I always read 0 back.

 

Am I missing something during steps above? Please give me some hints or suggestions. Thank a lot.

1.jpg
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1,874 Views
Registered: ‎04-20-2017

Why do you want to access the spi over dev mem? It sounds like it's screaming for producing undefined behavior.

Different spi devices have different communication protocols, or sequences on how things have to happen.

You can have a look at the ma page of spidev. One option is ti control the spi communication via ioctl kernel calls from userspace, you can build the communication as defined by the data sheet of the device you try to communicate with
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1,872 Views
Registered: ‎04-20-2017

Some spi devices for example only shift out data while you clock in dummy data
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Visitor
Visitor
1,825 Views
Registered: ‎11-30-2017

Thank you for your reply.

 

Yes, you are right. Probably I should use spidev instead of /dev/mem. But I cannot see data output on hardware pin. Here is what I did:

a) I updated the device tree and get /dev/spi1.0 in Linux. In software, I'm using spidrv-test tool, an open source for SPI test. When sending data, there is no error return in software but cannot see output data on hardware pins.

 

b) I also tried to send data in U-boot command line with md and mw command. With mw command, I could write SPI controller registers. In this way, I configure SPI controller and send data, but no data appears on MOSI pin.

 

I'm wondering if I miss something somewhere? Is it a software issue in Petalinux, or a hardware design problem in Vivado?

 

Thanks a lot.

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Observer
Observer
550 Views
Registered: ‎06-01-2016

Hi,

Any update on this? I noticed that some time after 2017.4, /dev/mem could not access PS controller registers like SPI, or I2C - they always read back 0. Same with the GPIO registers, unless you first export a gpio pin at /sys/class/gpio/export, then 0xe000a000 is available to read via /dev/mem.

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