07-07-2014 10:28 AM
Hi all,
I have instantiated a Block RAM and the respective BRAM Controller in PS. BRAM is configured as single port e both ports are enabled. One port is connected to external port and the other is connected to BRAM Controller. My problem now is how do i access the BRAM Controller from the linux application (if it is possible do that). I saw the datasheet of BRAM Controller and the only thing that is available to Linux OS is the option ECC which don't give me access to data information of BRAM.
Thanks in advance.
Cheers,
Davide
07-07-2014 11:35 AM
If you enable ECC in the controller you'll have two AXI ports: S_AXI, which connects to the BRAM, and S_AXI_CTRL which connects to the ECC control registers. Each port will have a unique address range.
07-07-2014 10:34 AM
Hi Davide,
If the BRAM is attached to one of the Zynq PS block's GP AXI ports, then you can access the memory in the BRAM by getting a pointer to the virtual address corresponding to the physical address of the BRAM. From userspace, one way to do this is via /dev/mem - check out the Linux kernel documentation. There are many examples online if you search.
Cheers,
Rob
07-07-2014 10:57 AM
Hi ra,
BRAM can't connect to any bus that's why i need some kind of controller to interact with him. My problem is that the controller which is available in EDK don't have controller registers to accessing and take data from BRAM.
Cheers,
Davide
07-07-2014 10:59 AM
Hi Davide,
You do need to use the BRAM controller. The BRAM controller itself has no registers, it just translates AXI transactions to the native BRAM interface ports. So, for example, if you have BRAM mapped into your system from 0x40000000 to 0x40001fff, you can use /dev/mem to map that address range and just access it directly.
Cheers,
Rob
07-07-2014 11:05 AM
07-07-2014 11:11 AM
Again, the BRAM controller is basically an address pass-through. The BRAM is mapped to the same address as the controller.
07-07-2014 11:23 AM
Oh sorry for dumb reply... What are i really wanted to ask is that:
There is a few register that are available in BRAM Controller which are related to ECC functionality that put me confused. How that register works if that is in the same address of BRAM.
07-07-2014 11:35 AM
If you enable ECC in the controller you'll have two AXI ports: S_AXI, which connects to the BRAM, and S_AXI_CTRL which connects to the ECC control registers. Each port will have a unique address range.
07-07-2014 11:37 AM
09-19-2018 10:17 PM
Hi
I am trying to access BRAM slots each of 32bytes. For testing slot 0 is filled with default values by FPGA. From user space using dev/mem, I am simultaneously reading from one slot and write to another slot which is getting failed. Any suggestions please.