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Visitor muxedup
Visitor
5,564 Views
Registered: ‎10-24-2016

BRAM write failure

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Hello, 

I am trying to write a simple test program to validate that my bram is working. So far it does not appear that the I can write to any of the addresses in the BRAM.

Currently, my program loops through the BRAM address space twice, once to write test values to memory, and the second to validate the values written. As a debug feature, I also immediately read back the value written to BRAM on the first iteration. The immediate read on write appears to be OK, but iterating through the address space again, all the values read 0x00 again!

 

 

I have checked my device tree and verified I am pointing to the proper address range in my code, and using devmem to write to this address range also does not seem to work. Any thoughts as to what I may be doing wrong? 

In petalinux configuration I also noticed that the address range of the bram 0x40000000 - 0x4000FFFF

 

Soure code and device tree fragments attached.

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Moderator
Moderator
8,331 Views
Registered: ‎10-06-2016

Re: BRAM write failure

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Hi Munan,

 

I used you TCL to recreate your BD and I have been able to check that BRAM works properly, so not sure where you are failing. Just see attached screenshots with the commands I run.

 

Capture.PNG

 

Take a look,

 

Regards,

Ibai


Ibai
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13 Replies
Xilinx Employee
Xilinx Employee
5,555 Views
Registered: ‎01-21-2014

Re: BRAM write failure

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Did you first verify that you can do the read/write with a bare metal application or XSDB? Is there any other logic the PL that you can successfully access using devmem?

 

Regards, 

Terry

 

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Visitor muxedup
Visitor
5,540 Views
Registered: ‎10-24-2016

Re: BRAM write failure

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Terry,

 

I don't have too much experience with baremetal development, but I tried accessing the BRAM through the debugger to no effect:

Just configuring the FPGA with the bitfile, and launching the debugger on the baremetal platform (I am using the zc702 evaluation kit) I get the same behavior as I did while running linux. Similarly I also launched the debugger while in the u-boot environment and got the same results.

 

I look forward to hearing your thoughts on this issue.

 

Munan

 

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Moderator
Moderator
5,503 Views
Registered: ‎10-06-2016

Re: BRAM write failure

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Hi Munan,

 

Try the following steps to check your BRAM controller through XSCT console.

 

1. Create a hardware platform project within SDK from your HDF file

2. Program the FPGA

3. Open the ZXCT console and type the following commands:

 

 

connect
source <project_path>/ps7_init.tcl

targets 1
loadhw <project_path>/system.hdf
ps7_init
ps7_post_config

4. Test memory with mrd and mwr commands

xsdb% mrd 0x40000000
40000000:   00000000

xsct% mwr 0x40000000 0xDEADBEEF
xsct% mrd 0x40000000
40000000:   DEADBEEF

Regards,

Ibai

 


Ibai
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Visitor muxedup
Visitor
5,433 Views
Registered: ‎10-24-2016

Re: BRAM write failure

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Hello Ibai

I tried these steps and I still am reading 0x00000000 after the write. Does this indicate that I did not set up my hardware configuration correctly?

Best,

Munan
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Moderator
Moderator
5,417 Views
Registered: ‎10-06-2016

Re: BRAM write failure

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Hi Munan,

 

Looks like a hardware configuration failure... You can post your BD and address space or share the tcl file to reproduce the issue by the forum people (be sure that you can share it ;) ).

 

Regards,

Ibai


Ibai
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Visitor muxedup
Visitor
5,404 Views
Registered: ‎10-24-2016

Re: BRAM write failure

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Ibai,

 

Here is the tcl file for my project. It should just be a standard zc702 example base design with a block ram generator connected to the AXI interconnect through an axi bram controller.

 

Munan Xu

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Moderator
Moderator
5,390 Views
Registered: ‎10-06-2016

Re: BRAM write failure

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Hi @muxedup

 

The tcl script requires the BD design to be deployed. It's better if you update just the BD, creating by the command write_bd_tcl command.

 

Regards,

Ibai


Ibai
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Visitor muxedup
Visitor
5,380 Views
Registered: ‎10-24-2016

Re: BRAM write failure

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Here is the tcl file from running write_bd_tcl

 

Munan

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Visitor muxedup
Visitor
5,280 Views
Registered: ‎10-24-2016

Re: BRAM write failure

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Hello, 

 

Was there any development on this? Or are there any other things I should try? 

 

Best,

 

Munan Xu

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Moderator
Moderator
8,332 Views
Registered: ‎10-06-2016

Re: BRAM write failure

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Hi Munan,

 

I used you TCL to recreate your BD and I have been able to check that BRAM works properly, so not sure where you are failing. Just see attached screenshots with the commands I run.

 

Capture.PNG

 

Take a look,

 

Regards,

Ibai


Ibai
Don’t forget to reply, kudo, and accept as solution.
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Visitor muxedup
Visitor
3,649 Views
Registered: ‎10-24-2016

Re: BRAM write failure

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Hello Ibai,

 

Thanks for your help! Not sure what I was doing wrong before, but following your screen capture worked for me.

 

Regards,

 

Munan Xu

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Visitor muxedup
Visitor
3,483 Views
Registered: ‎10-24-2016

Re: BRAM write failure

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As a follow up, I did manage to get BRAM access working in Linux as well. For some reason, the FPGA wasn't being configured at boot, and so manually programming the FPGA enabled me to access the BRAM.

 

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157 Views
Registered: ‎07-26-2019

Re: BRAM write failure

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Hi,

I want to access the BRAM through Linux. For that Iam using devmem and mmap function. I have written cpp program with base address of 0xA0000000(axi be controller aadr) for writing and reading. Without using petalinux, I generated the image and boot.bin files. When I compile my program on zcu102 board directly ,without any errors it got compiled. When I run the object file Iam not getting any output,instead my terminal is stucking there!! Where am I doing mistake? Even if I give hello world in the same program for verification,that is also not printing on gtkterm. 

While creating boot files shall I need to add anything for accessing BRAM?

I red in  xilinx forum like, we need to change something in device tree? Is it mandatory? If yes,how can I do that?

Is there any particular root file syst for this type of program?

Thank you,

IMG_20190905_162800.jpg
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