UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 
Adventurer
Adventurer
1,958 Views
Registered: ‎10-17-2016

Booting fails at BL31 with message failed to get clock

I'm trying to migrate the Zynq UltraScale+ MPSoC Software Acceleration TRD 2016.4 which is designed for the ES1 version of the ZCU102 board to the ES2 version.

So far, I have updated all the IP blocks in the block design, re-generated the bitstream, exported the hardware, re-generated the device-tree source, rebuilt the SDSOC bitstream and library, rebuilt the whole petalinux and software.

Now, the board boots up to the bootloader, then fails:

Xilinx Zynq MP First Stage Boot Loader 
Release 2016.3 Jul 19 2017 - 13:05:17
Platform: Silicon (3.0), Cluster ID 0x80000000
Running on A53-0 (64-bit) Processor, Device Name: XCZU9EG
Processor Initialization Done
================= In Stage 2 ============
SD1 with level shifter Boot Mode
SD: rc= 0
File name is BOOT.BIN
Multiboot Reg : 0x0
Image Header Table Offset 0x8C0
*****Image Header Table Details********
Boot Gen Ver: 0x1020000
No of Partitions: 0x5
Partition Header Address: 0x280
Partition Present Device: 0x0
Initialization Success
======= In Stage 3, Partition No:1 =======
UnEncrypted data Length: 0x3978EC
Data word offset: 0x3978EC
Total Data word length: 0x3978EC
Destination Load Address: 0xFFFFFFFF
Execution Address: 0x0
Data word offset: 0xF5B0
Partition Attributes: 0x20
Destination Device is PL, changing LoadAddress
Bitstream download to start now
XPFW: Calling ROM PWRUP Handler..Done
XPFW: Calling ROM Isolation Handler..Done
DMA transfer done
PL Configuration done successfully
XPFW: Calling ROM PWRUP Handler..Parti
ion 1 Load Success
======= In Stage 3, Partition No:2 =======
UnEncrypted data Length: 0x1800
Data word offset: 0x1800
Total Data word length: 0x1800
Destination Load Address: 0xFFFEA000
Execution Address: 0xFFFEA000
Data word offset: 0x3A6EA0
Partition Attributes: 0x107
Partition 2 Load Success
======= In Stage 3, Partition No:3 =======
UnEncrypted data Length: 0x8
Data word offset: 0x8
Total Data word length: 0x8
Destination Load Address: 0xFFFF0000
Execution Address: 0x0
Data word offset: 0x3A86A0
Partition Attributes: 0x107
Partition 3 Load Success
======= In Stage 3, Partition No:4 =======
UnEncrypted data Length: 0x20EF8
Data word offset: 0x20EF8
Total Data word length: 0x20EF8
Destination Load Address: 0x8000000
Execution Address: 0x8000000
Data word offset: 0x3A86B0
Partition Attributes: 0x104
Partition 4 Load Success
All Partitions Loaded
================= In Stage 4 ============
PMUFW: PmInit:
NODE_APLL #3:
acpu #1 { NODE_APU }
gdma #1 { NODE_GDMA }
dp_dma #1 { NODE_DP }
dbg_tstmp #0 { }
NODE_VPLL #1:
dp_audio #1 { NODE_DP }
NODE_DPLL #2:
ddr #1 { NODE_DDR }
pcie #1 { NODE_PCIE }
NODE_RPLL #5:
dp_video #1 { NODE_DP }
dp_stc #1 { NODE_DP }
sdio1 #1 { NODE_SD_1 }
pcap #0 { }
pl1 #1 { NODE_PL }
pl2 #1 { NODE_PL }
timestamp #0 { }
NODE_IOPLL #29:
dbg_trace #0 { }
dbg_fpd #0 { }
gpu #1 { NODE_GPU }
sata #1 { NODE_SATA }
gtg_ref0 #0 { }
usb3_dual #0 { }
gem0 #1 { NODE_ETH_0 }
gem1 #1 { NODE_ETH_1 }
gem2 #1 { NODE_ETH_2 }
gem3 #1 { NODE_ETH_3 }
usb0_bus #1 { NODE_USB_0 }
usb1_bus #1 { NODE_USB_1 }
qspi #1 { NODE_QSPI }
sdio0 #1 { NODE_SD_0 }
uart0 #1 { NODE_UART_0 }
uart1 #1 { NODE_UART_1 }
spi0 #1 { NODE_SPI_0 }
spi1 #1 { NODE_SPI_1 }
can0 #1 { NODE_CAN_0 }
can1 #1 { NODE_CAN_1 }
cpur5 #1 { NODE_RPU }
iou_switch #0 { }
csu_pll #0 { }
lpd_switch #0 { }
lpd_ls_bus #0 { }
dbg_lpd #0 { }
nand #1 { NODE_NAND }
adma #1 { NODE_ADMA }
pl0 #1 { NODE_PL }
pl3 #1 { NODE_PL }
gem_tsu #4 { NODE_ETH_3, NODE_ETH_2, NODE_ETH_1, NODE_ETH_0 }
dll #2 { NODE_SD_1, NODE_SD_0 }
ams #0 { }
i2c0 #1 { NODE_I2C_0 }
i2c1 #1 { NODE_I2C_1 }
Protection configuration applied
 ATF running on XCZU9EG/silicon v3/RTL5.1 at 0xfffea000, with PMU firmware
NOTICE: BL31: Secure code at 0x0
NOTICE: BL31: Non secure code at 0x8000000
NOTICE: BL31: v1.2(release):5d520c7
NOTICE: BL31: Built : 10:49:57, Jul 13 2017
failed to get clock
failed to get clock
failed to get clock
failed to get clock
failed to get clock
No serial driver found
resetting ...
PMUFW: PmProcessRequest: ERROR invalid payload, status #15
PMUFW: PmProcessAckRequest: ERROR PM operation failed - code 15

As far as I can tell, the FSBL is fine, the bitstream is configured, the PMU_FW loads. Only the bootloader seems to have problems.

 

I'm using Vivado 2016.4 with Petalinux 2016.3 as suggested in the Wiki.

 

Can anyone give me a hint what is wrong? I suspect the device tree, but I did not get any errors when building the dtb.

0 Kudos
3 Replies
Visitor thiruparan
Visitor
465 Views
Registered: ‎11-09-2018

Re: Booting fails at BL31 with message failed to get clock

how did you enable these debug messages

0 Kudos
Adventurer
Adventurer
429 Views
Registered: ‎10-17-2016

Re: Booting fails at BL31 with message failed to get clock

It has been quite a while, but I would say you choose the message level in the config of the bootloader..

0 Kudos
Xilinx Employee
Xilinx Employee
405 Views
Registered: ‎11-28-2007

Re: Booting fails at BL31 with message failed to get clock

For FSBL see pages 72-74 of UG1137 (v8.0) looking at the FSBL_DEBUG* flags. For PMU FW see page 138 of the same document. For ATF see https://www.xilinx.com/support/answers/71156.html.

0 Kudos