UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 
Highlighted
Observer kruucian
Observer
603 Views
Registered: ‎05-18-2018

CDMA high latency & low bandwidth with Petalinux

 

we achieved DDR to BRAM bandwidth on Standalone about ~2000MB/s (8192Byte/3850ns)

 

but with Petalinux(2018.1),  it was 410MB/s (8192Byte/20002ns)

 

 StandalonePetalinux
ZynqMP1200MHz1333MHz
DMA240MHz300MHz
8K Transfer Latency 3,850 ns20,000 ns
8K Transfer BW2030 MB/s410 MB/s

 

both system using same hardware but only CPU & DMA Frequency was slightly increased

 

in petalinux, we handle CDMA like below

 

1. map_single
2. device_prep_dma_memcpy
3. wait_for_completion_interruptible_timeout
4. dma_unmap_single

 

 

Is it normal to get ~400MB/s bandwidth with CDMA in Petalinux?

 

If the way we control CDMA is wrong, how is it appropriate to approach?

0 Kudos
2 Replies
Xilinx Employee
Xilinx Employee
556 Views
Registered: ‎10-04-2016

Re: CDMA high latency & low bandwidth with Petalinux

Hi @kruucian,

When you measure the time to complete the transfer in Linux, where do you start and where do you stop your timer? It seems like your measurement is including a lot of operating system related overhead, which is going to hurt the bandwidth numbers for the CDMA hardware.

 

Regards,

 

Deanna

-------------------------------------------------------------------------
Don’t forget to reply, kudo, and accept as solution.
-------------------------------------------------------------------------
0 Kudos
Observer kruucian
Observer
543 Views
Registered: ‎05-18-2018

Re: CDMA high latency & low bandwidth with Petalinux

Hi, @demarco

 

I measured the time 3 different point(map src, map dst, device_prep_dma_cpy+unmap both buffer) and accumulated later.

 

We decided to abandon all the DMA related Linux/Xilinx-linux APIs.

also abandoned DMA IRQ, we're now polling DMA Regs directly.

 

now 8KB DDR-to-DDR transfer latency decreased to ~4300ns and so on.

as you know DDR-to-BRAM will be better.

0 Kudos