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Adventurer
Adventurer
543 Views
Registered: ‎01-01-2019

Check PL done in u-boot

Hi, 

I'm using custom Zynq UltraScale+ MPSoC board.

I load bitstream from u-boot use "fpga loadb" command.

I want to know how to check pl done status in u-boot.

2020-01-03_110932.png

Thanks.

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Xilinx Employee
Xilinx Employee
526 Views
Registered: ‎11-05-2019

 

Hello @damon 

You may find that hint in the FSBL.
Because FSBL has loaded the PL Bitstream and confirmed the completion.

xfsbl_bs.c
XFsbl_PLWaitForDone()

Thanks
Yoichi

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Adventurer
Adventurer
509 Views
Registered: ‎01-01-2019

Hi @katsuki,

I already referenced XFsbl_PLWaitForDone().

I used "md" command to read pcap_status register (md 0xFFCA3010), but i got following error

ZynqMP> md 0xFFCA3010
ffca3010:"Synchronous Abort" handler, esr 0x96000010
elr: 000000000805dd20 lr : 000000000805dcdc (reloc)
elr: 000000003ff74d20 lr : 000000003ff74cdc
x0 : 0000000000000009 x1 : 0000000000000000
x2 : 0000000000000802 x3 : 0000000000000000
x4 : 00000000ffca3010 x5 : 000000003ff8e57b
x6 : 0000000000000004 x7 : 000000000000000f
x8 : 00000000ffffffd0 x9 : 0000000000000000
x10: 0000000000000010 x11: 0000000000000000
x12: 0000000000000000 x13: 0000000000000000
x14: 0000000000000000 x15: 0000000000000008
x16: 0000000000000000 x17: 0000000000000000
x18: 000000003df06dc8 x19: 0000000000000040
x20: 0000000000000004 x21: 00000000ffca3010
x22: 00000000ffca3010 x23: 000000003ff8dcc4
x24: 0000000000000008 x25: 0000000000000009
x26: 0000000000000004 x27: 0000000000000004
x28: 000000003defccd8 x29: 000000003defcc50

Resetting CPU ...

### ERROR ### Please RESET the board ###
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Xilinx Employee
Xilinx Employee
447 Views
Registered: ‎11-05-2019

 

Hi @damon 

 

You can see the status of PCAP with "fpga" command of u-boot.

 

Thanks

Yoichi

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Adventurer
Adventurer
405 Views
Registered: ‎01-01-2019

Hi @katsuki,

I checked "fpga" command in u-boot, but I'm not sure which one can see the status of PCAP.

Can you please help? 

Thanks.

2020-01-06_095434.png

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Xilinx Employee
Xilinx Employee
395 Views
Registered: ‎11-05-2019

Hi, @damon 

fpga info

Capture.PNG

 

Thanks

Yoichi

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Adventurer
Adventurer
394 Views
Registered: ‎01-01-2019

Hi @katsuki,

Sorry, I did not say it clearly.

My u-boot version is 2017.4, it seems PCAP status cannot be read in this version?

2020-01-06_103100.png

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Moderator
Moderator
356 Views
Registered: ‎09-12-2007

This would need to be done via an SMC (system monitor call), this is why they system is crashing when you try to read this register.

https://www.linaro.org/app/resources/Connect%20Events/Trusted_Firmware_Deep_Dive_v1.0_.pdf

 

You can see how this is done below:

https://github.com/Xilinx/u-boot-xlnx/blob/36452060d0ba576314783d74f517c3886ce1867f/drivers/fpga/zynqmppl.c

 

If you are using 2017.4, you can just create a patc hand add this code here.

 

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Adventurer
Adventurer
351 Views
Registered: ‎01-01-2019

Yes, I have already read the pcap_status register directly.

I used "md" command to read pcap_status register (md 0xFFCA3010), but i got following error

ZynqMP> md 0xFFCA3010
ffca3010:"Synchronous Abort" handler, esr 0x96000010
elr: 000000000805dd20 lr : 000000000805dcdc (reloc)
elr: 000000003ff74d20 lr : 000000003ff74cdc
x0 : 0000000000000009 x1 : 0000000000000000
x2 : 0000000000000802 x3 : 0000000000000000
x4 : 00000000ffca3010 x5 : 000000003ff8e57b
x6 : 0000000000000004 x7 : 000000000000000f
x8 : 00000000ffffffd0 x9 : 0000000000000000
x10: 0000000000000010 x11: 0000000000000000
x12: 0000000000000000 x13: 0000000000000000
x14: 0000000000000000 x15: 0000000000000008
x16: 0000000000000000 x17: 0000000000000000
x18: 000000003df06dc8 x19: 0000000000000040
x20: 0000000000000004 x21: 00000000ffca3010
x22: 00000000ffca3010 x23: 000000003ff8dcc4
x24: 0000000000000008 x25: 0000000000000009
x26: 0000000000000004 x27: 0000000000000004
x28: 000000003defccd8 x29: 000000003defcc50

Resetting CPU ...

### ERROR ### Please RESET the board ###
 
 
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Moderator
Moderator
344 Views
Registered: ‎09-12-2007

Ill have a look at the driver when I get to my desk to see how this is done here and let you know

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