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Contributor
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Registered: ‎03-29-2019

Cosimulation SystemC-tlm /Qemu Xilinx

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hello !! i need help ,
i am working about the subject of co-simulation SystemC-tlm with QEMU xilinx, i did big research for the subject, i finally found that the best solution is to use systemC-tlm to connect PS to PL, but i found just a demo in wiki page, its not explained how to put tlm exactly into a personal project, to be more clear, i have some points and needs answer and thanks a lot:
-Can i use vivado to create my RTL IP then using HLS and sdk for the application, then using HLS to generate SystemC code for the IP ??
-Can I using IP in vivado and integrate it with systemC-tlm and QEMU without translating IP in Vivado to a SystemC code ?
-And if i succeed to get SystemC code generating from HLS, should i add code to enable tlm or just using library systemc soc from github ?
-IF should i add some code, any tutorial that can help how to do that ?
so many questions , in fact i have a very short time to solve this , thanks a lot , i hope you have the time to answer me

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Moderator
Moderator
452 Views
Registered: ‎12-04-2016

Hi @hamdi436 

Yes you need to add tlm libraries to the generated code

 

Best Regards

Shabbir

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Moderator
Moderator
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Registered: ‎12-04-2016

Hi @hamdi436 

Please find below the answers to your queries:

1. Yes, you can use the approach of generating systemC code for IP using HLS

2. Are you talking about your own IP or Xilinx IP ? In Sdsoc you should be able to use any IP and being able to co simulate it with QEMU.  

3.It depends on what tools you use, if you use Sdsoc, most of the functionality will be there for you, but if you just use Vivado/HLS and XSim then no. And if your IP is already in RTL then Sdsoc will still co-simulate with it without needing to convert it to SystemC

 

Best Regards

Shabbir

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Registered: ‎03-29-2019

Hi @shabbirk , tanks , 

Am usine design through vivado , i still have question , if i use hls and get systemc code , i have To add tlm to the generated code ? 

I will use firstly  ultrascale ps + bram or gpio  To blink a led and if i succeed i will get License To applicate the method on rfsoc by a compléte design of adc/dac

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Moderator
Moderator
453 Views
Registered: ‎12-04-2016

Hi @hamdi436 

Yes you need to add tlm libraries to the generated code

 

Best Regards

Shabbir

View solution in original post

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Contributor
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Registered: ‎03-29-2019

thanks a lot 

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Contributor
Contributor
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Registered: ‎03-29-2019

hi @shabbirk ,

I need some informations about SDSoC : do i just need sdsoc to do the cosimulation ? or i can do the design in vivado then use it in sdsoc ?? and if there is a tutorial to begin i will be thankfull.

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Moderator
Moderator
406 Views
Registered: ‎12-04-2016

Hi @hamdi436 

You should have a design in vivado. You can refer to below user guide on sdsoc

https://www.xilinx.com/support/documentation/sw_manuals/xilinx2018_3/ug1027-sdsoc-user-guide.pdf

(Refer to Building the SDSoC Project)

We also have a designhub for sdsoc here:

https://www.xilinx.com/support/documentation-navigation/design-hubs/dh0057-sdsoc-hub.html

 

 

Best Regards

Shabbir

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