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Adventurer
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Registered: ‎07-31-2017

Customizing pins for SD card on Zynq MP

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We are using xilinx-zcu102-2017.4 BSP to build binaries for our board.  We have discovered we don't have control over the MIO42 pin.  In the ZCU102 eval board, the MIO42 pin is used as part of the SD card level shifter which we don't have on our board.  Our board runs the SD card at 3.3V only.  The pins it uses are:

MIO51 - SD Clk

MIO50 - SD Cmd

MIO49 - D3

MIO48 - D2

MIO47 - D1

MIO46 - D0

MIO45 - CD

 

I'm trying to find a way to instruct the device tree not to grab MIO42 because MIO42 is used to enable a chip on our board.

If anyone can suggest a way to do this, I'd appreciate it.  Thanks!

 

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Adventurer
Adventurer
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Registered: ‎05-26-2017

I think this is configured in Vivado, then the FSBL sets up the MIO pin mux for the correct operation. 

 

Pull up the pin-configuration for the SDIO device and make sure MIO42 is not taken

 

Alternatively it could be the the pinctrl in the dts file (system-user.dtsi). Find the correct group by looking at 

 

pinctrl_sdhci0_default: sdhci0-default {
mux {
    groups = "sdio0_5_grp"; //2018.1 MIO38, 40, 41, 42, 43, 44 (from pinctrl-zynmp.c)
    function = "sdio0";
};

 

conf {
   groups = "sdio0_5_grp"; //2018.1 MIO38, 40, 41, 42, 43, 44 (from pinctrl-zynmp.c)
   slew-rate = <SLEW_RATE_SLOW>;
   io-standard = <IO_STANDARD_LVCMOS18>;
   bias-disable;
};

 

Find the correct group using something like 

 

cat /sys/kernel/debug/pinctrl/ff180000.pinctrl/pingroups | grep sdio0 -A 5

 

/Otto

 

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Adventurer
Adventurer
1,335 Views
Registered: ‎05-26-2017

I think this is configured in Vivado, then the FSBL sets up the MIO pin mux for the correct operation. 

 

Pull up the pin-configuration for the SDIO device and make sure MIO42 is not taken

 

Alternatively it could be the the pinctrl in the dts file (system-user.dtsi). Find the correct group by looking at 

 

pinctrl_sdhci0_default: sdhci0-default {
mux {
    groups = "sdio0_5_grp"; //2018.1 MIO38, 40, 41, 42, 43, 44 (from pinctrl-zynmp.c)
    function = "sdio0";
};

 

conf {
   groups = "sdio0_5_grp"; //2018.1 MIO38, 40, 41, 42, 43, 44 (from pinctrl-zynmp.c)
   slew-rate = <SLEW_RATE_SLOW>;
   io-standard = <IO_STANDARD_LVCMOS18>;
   bias-disable;
};

 

Find the correct group using something like 

 

cat /sys/kernel/debug/pinctrl/ff180000.pinctrl/pingroups | grep sdio0 -A 5

 

/Otto

 

View solution in original post

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Adventurer
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Registered: ‎07-31-2017

ottob has pointed me in the right direction but I'll post all my steps for completeness just in case someone else needs it.  This is for BSP ZCU102, 2017.4:

  1. Start petalinux-config, remove/replace zcu102-rev1.0 in MACHINE_NAME so zcu102-rev1.0.dtsi isn’t added to dev tree.
  2. Copy applicable definitions from zcu102-rev1.0.dtsi to system-user.dtsi
  3. Find matching SD pin group in pinctrl-zynmp.c in kernel
  4. Get matching pin group name in /sys/kernel/debug/pinctrl/ff180000.pinctrl/pingroups
  5. Modify pinctrl in  system-user.dtsi with pin group name

 

   pinctrl_sdhci1_default: sdhci1-default {

      mux {

         groups = "sdio1_4bit_0_1_grp";

         function = "sdio1";

      };

 

      conf {

         groups = "sdio1_4bit_0_1_grp";

         slew-rate = <1>;

         io-standard = <1>;

         bias-disable;

      };

 

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Adventurer
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Registered: ‎05-26-2017

Nice write-up! Glad to hear you got it working 

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