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Observer tscbailey
Registered: ‎11-19-2018

Device Tree Issue when adding a second Ethernet port to ZCU102 (XAPP1305)

I am trying to add a SFP based second Ethernet port onto my zcu102 board.  I am
using the XAPP1305 note to implement the SGMII interface with PS EMIO
connectivity. I am doing this with Petalinux 2018.2.  

Using the tcl scripts in the xapp1305-ps-pl-based-ethernet-solution design
files, I was able to generate a project in Vivado 2018.1 and import that project
into Vivado 2018.2.  From there I exported an HDF file (with bitstream) to be
pulled into petalinux 2018.2

I built my petalinux project as follows:

$ petalinux-create -t project -s ~/xilinx-zcu102-v2018.2-final.bsp
$ cd xilinx-zcu102-2018.2
$ petalinux-config --get-hw-description=<directory holding my exported HDF>

I changed the MAC address in the configuration step to be unique on my network.

I then patched the FSBL with the modifcations to set the clock to 125 MHz

$  cd components/plnx_workspace/fsbl/fsbl  
$  patch -p4 < ~/ar71295_fsbl_patch/0001-fsbl-si570-clk-config-on-A53.patch

I exchanged the ./project-spec/meta-user/recipes-bsp/device-tree/files/system-user.dtsi file with the one in the ar71295_fix_1G_dtsi_wt_modifications.zip

/include/ "system-conf.dtsi"
/ {

&gem0 {
    local-mac-address = [00 0a 35 00 22 01];
    phy-handle = <&phy9>;
    phy9: phy@9 {
        reg = <0x9>;
        xlnx,phy-type = <0x4>;
&i2c1 {
        status = "okay";
        clock-frequency = <400000>;
        i2cswitch@74 { /* u34 */
                compatible = "nxp,pca9548";
                #address-cells = <1>;
                #size-cells = <0>;
                reg = <0x74>;

I then built my image and loaded it on the zcu102 board.  It appears that the
removal of the i2c@3 node did not occur.  During the initialization, I get the

[    3.631799] si570 9-005d: registered, current frequency 148500000 Hz

which indicates that the Si570 was programmed to the wrong frequency.   I did a
dump of the image/linux/system.dtb and see the following:

        i2c@3 {
            #address-cells = <0x00000001>;
            #size-cells = <0x00000000>;
            reg = <0x00000003>;
            clock-generator3@5d {
                #clock-cells = <0x00000000>;
                compatible = "silabs,si570";
                reg = <0x0000005d>;
                temperature-stability = <0x00000032>;
                factory-fout = <0x09502f90>;
                clock-frequency = <0x08d9ee20>;

Is there something I am missing?   
Has the generation of the device tree changed in the move to 2018.2?



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