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Observer jamesba-bbc
Observer
12,748 Views
Registered: ‎07-27-2011

Devicetree Generator Fails with AXI 10G Ethernet

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On a Zynq 7045 device I have a design with an axi_10G_ethernet core configured with the internal PCS/PMA core in BASE-R mode. The s_axis_tx and m_axis_rx are connected to the M_AXIS_MM2S and S_AXIS_S2MM ports of an AXI_DMA core generated without the control/status stream (since the 10G MAC has no matching ports for these). When I generate a devicetree for this design using the latest device tree generator code the command fails with the following error:

 

can't read "tx_tsip": no such variable
ERROR: [Hsi 55-1545] Problem running tcl command ::sw_axi_ethernet::generate : can't read "tx_tsip": no such variable
    while executing
"set_property axififo-connected "$tx_tsip" $drv_handle"
    (procedure "::sw_axi_ethernet::generate" line 62)
    invoked from within
"::sw_axi_ethernet::generate axi_10g_ethernet_0"
ERROR: [Hsi 55-1442] Error(s) while running TCL procedure generate()
ERROR: [Common 17-39] 'generate_target' failed due to earlier errors.


Looking at the tcl script in the devicetree generator it looks as though the code is perhaps failing to detect the presence of the attached DMA core and trying to assign an attached AXI FIFO instead, and then failing because no such FIFO is connected. Can anyone help with this?

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1 Solution

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Xilinx Employee
Xilinx Employee
22,790 Views
Registered: ‎02-18-2014

Re: Devicetree Generator Fails with AXI 10G Ethernet

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For AXI 10G Ethernet there is no in-built buffers to store the ethenret packet so there should be a streaming peripheral for storing the MAC packet before passing it to the DMA/AXI Fifo For that streaming interface we can use axi stream Data fifo.. And the Current DTG assumes that there is a streaming periphreal b/w the MAC and DMA. hope it clears your doubts..

5 Replies
Xilinx Employee
Xilinx Employee
12,642 Views
Registered: ‎02-18-2014

Re: Devicetree Generator Fails with AXI 10G Ethernet

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Attached the Fix. Replace the attached tcl file with the one availble in your device-tree repo (device-tree-xlnx/axi_etheret/data).

The fix will be availble in xiilinx device-tree git soon..

Observer jamesba-bbc
Observer
12,216 Views
Registered: ‎07-27-2011

Re: Devicetree Generator Fails with AXI 10G Ethernet

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Thankyou, I've made that change and now I get a different error:

 

13:19:30 ERROR : (XSDB Server)ERROR: [Hsi 55-1545] Problem running tcl command ::sw_axi_ethernet::generate : can't read "rxethmem": no such variable
while executing
"set_property xlnx,rxmem "$rxethmem" $drv_handle"
(procedure "::sw_axi_ethernet::generate" line 63)
invoked from within
"::sw_axi_ethernet::generate Ethernet_axi_10g_ethernet_0"
ERROR: [Hsi 55-1442] Error(s) while running TCL procedure generate()

 

Again this variable seems to only be set if the core is connected to an axis_data_fifo, whereas I am trying to use the DMA engine.

 

Is it the case that the 10G MAC is only expected to be used with the fifo? Should I switch to trying a design using that instead?

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Xilinx Employee
Xilinx Employee
11,754 Views
Registered: ‎02-18-2014

Re: Devicetree Generator Fails with AXI 10G Ethernet

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Could you please provide the hdf file that you generated..

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Xilinx Employee
Xilinx Employee
22,791 Views
Registered: ‎02-18-2014

Re: Devicetree Generator Fails with AXI 10G Ethernet

Jump to solution

For AXI 10G Ethernet there is no in-built buffers to store the ethenret packet so there should be a streaming peripheral for storing the MAC packet before passing it to the DMA/AXI Fifo For that streaming interface we can use axi stream Data fifo.. And the Current DTG assumes that there is a streaming periphreal b/w the MAC and DMA. hope it clears your doubts..

Highlighted
Observer jamesba-bbc
Observer
11,672 Views
Registered: ‎07-27-2011

Re: Devicetree Generator Fails with AXI 10G Ethernet

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Yes thankyou, I now have it working (although for other reasons I have needed to manually modify the generated devicetree).

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