ETHERNETLITE with linux

[a.gamez]

Hi!

I've implemented a Microblaze system on the ARTY board, which includes a Texas Instruments DP83848 PHY chip to manage ethernet communications.

Xilkernel and example program 'echo server' works wonderfully, so any hardware issue is discarded.

However, on linux (using both mainstream and xilinx' github repo), I can't get ethernetlite core to work. This is the info I can provide:

Device tree:

                axi_ethernetlite_0: ethernet@40e00000 {
                        compatible = "xlnx,xps-ethernetlite-1.00.a";
                        device_type = "network";
                        interrupt-parent = <&microblaze_0_axi_intc>;
                        interrupts = <1 0>;
                        reg = <0x40e00000 0x10000>;
                        xlnx,duplex = <0x1>;
                        xlnx,include-global-buffers = <0x1>;
                        xlnx,include-internal-loopback = <0x0>;
                        xlnx,include-mdio = <0x1>;
                        xlnx,rx-ping-pong = <0x1>;
                        xlnx,s-axi-id-width = <0x1>;
                        xlnx,tx-ping-pong = <0x1>;
                        xlnx,use-internal = <0x0>;
                        axi_ethernetlite_0_mdio: mdio {
                                #address-cells = <1>;
                                #size-cells = <0>;
                                phy0: phy@0 {
                                        device_type = "ethernet-phy";
                                        reg = <0>;
                                };
                        };
                };

phy0 section was written by me, as it was not provided by dts creation utility for the SDK.

dmesg output:

xilinx_emaclite 40e00000.ethernet: Device Tree Probing                                                                                                                                                              
xilinx_emaclite 40e00000.ethernet: Failed to register mdio bus.                                                                                                                                                     
xilinx_emaclite 40e00000.ethernet: error registering MDIO bus                                                                                                                                                       
xilinx_emaclite 40e00000.ethernet: MAC address is now 00:0a:35:00:00:00                                                                                                                                             
xilinx_emaclite 40e00000.ethernet: Xilinx EmacLite at 0x40E00000 mapped to 0xF0140000, irq=2

Relevant kernel config:

CONFIG_NET_VENDOR_XILINX=y
CONFIG_XILINX_EMACLITE=y
CONFIG_PHYLIB=y
CONFIG_DP83848_PHY=y
CONFIG_XILINX_PHY=y

eth0 interface appears, and ifconfig eth0 192.168.1.222 doesn't produce any error. However, no other host on the network can reach the ARTY nor viceversa, not by ping, nor by poking at any random port.

Any ideas?

Thanks!

[hxiaoqiang]

hi，

  It seems you have error on "of_mdiobus_register". Is your phy0's address is 0x0? check it.

[a.gamez]

---

@hxiaoqiang wrote:

hi，

  It seems you have error on "of_mdiobus_register". Is your phy0's address is 0x0? check it.

---

How do I check that? I only have one emaclite core and one phy chip

[hxiaoqiang]

check the ethernet phy chip datasheet,they may describe as "PHY address".

here is an example:(form B50610-DS07-RDS)

you'd better ask your hardware engineer for help or run " mii info "command in u-boot,the phy address will show.

but you should run a network command to start phy auto negotiation.(ping or dhcp) 0x19 is the phy address.

[a.gamez]

Thanks, that's served me as a guide to know what to look for.

I've found this document which, at page 9, stablishes what DP83848 PHY addr is https://download.beckhoff.com/download/Document/io/ethercat-development-products/an_phy_selection_guidev2.3.pdf

However, I've tried several values, ranging from PHY addr 0 to 4, and 16 to 20 with no luck, always with the same result. There must be something I'm missing, but I don't know what is it...

[gmarinkovic · Accepted solution]

Hello @a.gamez

I think I got it now, using  the ARTY board. If you're still interested, otherwise maybe someone else has the same problem.

In U-BOOT I see:

U-Boot>mii info                                                                 
PHY 0x01: OUI = 0x80017, Model = 0x09, Rev = 0x00, 100baseT, FDX 

So the Phy is working and is accessible.

Then I modified in petalinux the file:

project-spec/meta-user/recipes-bsp/device-tree/files/system-user.dtsi

Which now looks like:

/include/ "system-conf.dtsi"
/ {
};

&axi_ethernetlite_0 {
    phy-handle = <&phy0>;
    axi_ethernetlite_0_mdio: mdio {
        phy0: phy@1 {
            device_type = "ethernet-phy";
            reg = <1>;
        };
    };
};

Now the boot log of Linux shows properly:                                          
xilinx_emaclite 40e00000.ethernet: Device Tree Probing                          
libphy: Xilinx Emaclite MDIO: probed                                            
xilinx_emaclite 40e00000.ethernet: MAC address is now 00:0a:35:00:22:01         
xilinx_emaclite 40e00000.ethernet: Xilinx EmacLite at 0x40E00000 mapped to 0xF01

Cheers

Goran

[a.gamez]

Great, thanks! I finally solved it myself time ago, but I was never able to know how or why, so I'm accepting your post as solution, as it's basically the same DTS that I got to make it work.

By the way, would you mind to share your u-boot configuration? I'm now trying to use u-boot on the Arty with no success.

Thank you!

[gmarinkovic]

@a.gamez

Since this is my small hobby project I can share it with you. Just tell me which file you would like to have and I will send it to you... however not today, since I have a meeting till late.

Cheers

Goran

[a.gamez]

Of course, whenever it's possible for you to do so!

I think I'm doing something wrong in either board/xilinx/microblaze-generic/xparameters.h board/xilinx/microblaze-generic/config.mk (although this I'm not actually modifying, for it takes its configuration from uboot .config, so let's include also uboot/.config file). And maybe the DTS too. I think I could replicate your setup with these files, adjusting simply for the differences that may be between our fpga design.

Do you remember if you needed to set anything else, apart from those files?

Thanks a lot!

[gmarinkovic]

@a.gamez

I think I did everything as documented by Xilinx... and in Petalinux. When I see the code maybe I will remember if I did something special and I will let you know.

Cheers

Goran

[a.gamez]

Thanks!

Thing is, I'm not using Petalinux, but buildroot, so I have to do a lots of things manually... In the meantime, I think I'm gonna search for Petalinux and try it out. Even if I end up using buildroot, it seems that's the only supported way and will get me these self generating files under Petalinux.

Best regards!

[gmarinkovic]

@a.gamez

Hello... and attached my cleaned up project... please let me know if you need any of the automatically build files.

Cheers

Goran

[a.gamez]

@gmarinkovicWow, thanks a lot! I'll be playing with it throughout this month. Let's see what I can do!

Best regards!