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Contributor
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Registered: ‎02-04-2015

Ethernet not working on custom board with Zynq-7020 and Micrel KSZ9031

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I am trying to run Petalinux v2015.4 on a custom board that has Zynq-7020 and Micrel KSZ9031 ethernet. I created a project using the HDF file for the custom board as shown in ug1144.

 

Petalinux boots and finds the KSZ9031 PHY chip.

 

macb e000b000.ethernet eth0: Cadence GEM rev 0x00020118 at 0xe000b000 irq 149 (00:0a:35:00:1e:53)
macb e000b000.ethernet eth0: attached PHY driver [Micrel KSZ9031 Gigabit PHY] (mii_bus:phy_addr=e000b000.etherne:00, irq=-1)

 

After logging in I run 'ifconfig -a' and eth0 seems fine, it even shows bytes received and transmitted.

 

root@CoreLinux:~# ifconfig -a
eth0 Link encap:Ethernet HWaddr 00:0A:35:00:1E:53
inet addr:192.168.1.200 Bcast:192.168.1.255 Mask:255.255.255.0
UP BROADCAST RUNNING MULTICAST MTU:1500 Metric:1
RX packets:1 errors:0 dropped:0 overruns:0 frame:0
TX packets:9 errors:0 dropped:0 overruns:0 carrier:0
collisions:0 txqueuelen:1000
RX bytes:239 (239.0 B) TX bytes:860 (860.0 B)
Interrupt:149 Base address:0xb000

 

Running ping, however, does not work. Wireshark doesn't see the packets.

 

root@CoreLinux:~# ping 192.168.1.99
PING 192.168.1.99 (192.168.1.99): 56 data bytes
^C
--- 192.168.1.99 ping statistics ---
5 packets transmitted, 0 packets received, 100% packet loss

 

Why is the PHY not responding to ping? This board runs fine with FreeRTOS + lwIP. In that platform I needed to add skews, which I have added to the petalinux system-top.dts file. I added prints to micrel.c to show that the skew values are being read correctly from the dts file (my prints have 'MICREL' at the start of the lines in the screen dump file).

 

I have attached my system-top.dts file and the screen dump from dmesg. I made changes to the system-top.dts file as per information I gathered from other posts, but I am not sure I have it configured properly. Is there documentation that describes the system-top.dts file contents better?

 

 

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Contributor
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Registered: ‎02-04-2015

@hbucher your post got me thinking that if the packets are getting malformed then maybe the skews are not correct. I went back over the skews in the device tree and noticed the clock and control skews were swapped. When I converted them from register values to 60ns counts I inadvertently swapped them! After swapping them back I get proper communication.

 

Here's my new device tree entry:

&gem0 {
    phy-handle = <&phy0>;
    phy0: phy@0 {
        compatible = "micrel,ksz9031";
        device_type = "ethernet-phy";
        rxc-skew-ps = <1740>;
        txc-skew-ps = <1860>;
        txen-skew-ps = <660>;
        rxdv-skew-ps = <900>;
        rxd0-skew-ps = <900>;
        rxd1-skew-ps = <900>;
        rxd2-skew-ps = <900>;
        rxd3-skew-ps = <900>;
        txd0-skew-ps = <0>;
        txd1-skew-ps = <0>;
        txd2-skew-ps = <0>;
        txd3-skew-ps = <0>;
        reg = <0>;
    };
};

 

Thanks for doing a bit of hand-holding.

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Scholar
Scholar
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Registered: ‎03-22-2016

@scwoods751  If it got an IP address from DHCP then packets are flowing. Or you assigned a static IP?

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Registered: ‎02-04-2015

@hbucher I assign a static IP address of 192.168.1.200, mask 255.255.255.0, gateway 192.168.1.99. My other test PC (Windows 10) is IP address 192.168.1.99. Both are hanging off a HP 1G switch.

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Scholar
Scholar
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Registered: ‎03-22-2016

@scwoods751 I would connect the PC and the board back to back (no switch) and run wireshark. According to ifconfig there are packets flowing. If the MDIO divisor is set wrong they might be malformed.

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@hbucher I connected the board directly to the Win10 computer running Wireshark. There is no activity on Wireshark on the NIC. I tried ping both ways. I forced the arp table to clear. I can disconnect/reconnect the cable and the PHY detects the link going down then up.

 

I am doubting that the device tree is set up correctly. I have tried it without the skew values, no change.

 

Any other tools to detect what might be wrong?

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Contributor
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Registered: ‎02-04-2015

@hbucher your post got me thinking that if the packets are getting malformed then maybe the skews are not correct. I went back over the skews in the device tree and noticed the clock and control skews were swapped. When I converted them from register values to 60ns counts I inadvertently swapped them! After swapping them back I get proper communication.

 

Here's my new device tree entry:

&gem0 {
    phy-handle = <&phy0>;
    phy0: phy@0 {
        compatible = "micrel,ksz9031";
        device_type = "ethernet-phy";
        rxc-skew-ps = <1740>;
        txc-skew-ps = <1860>;
        txen-skew-ps = <660>;
        rxdv-skew-ps = <900>;
        rxd0-skew-ps = <900>;
        rxd1-skew-ps = <900>;
        rxd2-skew-ps = <900>;
        rxd3-skew-ps = <900>;
        txd0-skew-ps = <0>;
        txd1-skew-ps = <0>;
        txd2-skew-ps = <0>;
        txd3-skew-ps = <0>;
        reg = <0>;
    };
};

 

Thanks for doing a bit of hand-holding.

View solution in original post

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Scholar
Scholar
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Registered: ‎03-22-2016

@scwoods751 Well I would say debug more. ILA is your friend.

http://www.xilinx.com/support/documentation/sw_manuals/xilinx2015_2/ug908-vivado-programming-debugging.pdf

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