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Explorer
Explorer
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Registered: ‎10-08-2016

FFT v9.0 C-model

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Thanks to the people on this forum I have made quite a bit of progress in just a few weeks.  My next task is to write a small app that will use the FFT V9 IP to do, well, an FFT.  I have PG 109 open in front of me and on page 69 it says "Unzip the FFT C model zip file."  Where do I find that?  The only Google hits are to PDFs referring to it or to forum questions asking about it.

 

I've found the .so and .h files on my machine, but my hardware colleague is skeptical about them because they are in the Vivado_HLS directory tree, and he didn't use HLS to generate the IP.  But in the interest of full disclosure, here is the find command and its output:

 

~$ find . -name xfft_v9_0_bitacc_cmodel.h
./vivado/Vivado_HLS/2015.4/lnx64/tools/fft_v9_0/xfft_v9_0_bitacc_cmodel.h
./vivado/Vivado_HLS/2015.4/include/fft/xfft_v9_0_bitacc_cmodel.h

~$ find . -name "lib*fft*.so"
./vivado/Vivado_HLS/2015.4/lnx64/tools/fft_v9_0/libIp_xfft_v9_0_bitacc_cmodel.so

 

I'd love to get my hands on the examples, especially run_bitacc_cmodel.c, but it's nowhere to be found, except for an 8-year-old version on someone's GitHub account, and I'm not ready to trust that yet.

 

As always, any help would be appreciated.

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Xilinx Employee
Xilinx Employee
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Registered: ‎08-02-2011

Re: FFT v9.0 C-model

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My colleague has implemented the FFT IP and I need to write an app that runs on the Zynq, generates
some data, calls the FFT IP to do the transform, then collect the results for further processing. I
have the notion that there should be available somewhere some function definitions that embody the
sequencing needed to make that happen. How can I find those?

Well the FFT core doesn't have a native processor interface (i.e. AXI Lite) for controlling the FFT core or passing the data. It uses AXI Stream interfaces because its intended for continuous streaming data. What you would do for this type of setup is likely use AXI DMA cores to move the data. Here's a good example:

https://www.xilinx.com/support/answers/58582.html

 

The AXI DMA core is what you'd mostly interface with software and we provide drivers for that core. See the example for more.

 

Now I'll use the word "model": is this C Model that I see referenced the code that I need to compile
onto the Zynq for real-time processing? I get the impression that it's a tool useful to the
hardware implementer to simulate the implemented IP, and I don't think that's what I'm looking for.

 

Exactly, the C model is intended for use on your desktop (i.e. x86) for doing algorithm development. It's not intended to be used in embedded environment with real time data. It's pure software.

www.xilinx.com

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Explorer
Explorer
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Registered: ‎10-08-2016

Re: FFT v9.0 C-model

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Am I even asking the right questions?  I don't want to IMPLEMENT the FFT; I want to USE it.  I get the impression from PG 109 that maybe the C Model is more about running on my development computer, when what I care about is running on the target device (right now a Zedboard, but soon a ZC706).

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Xilinx Employee
Xilinx Employee
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Registered: ‎08-02-2011

Re: FFT v9.0 C-model

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Hello,

 

Yeah, I think HLS makes a local copy of the c model for its own purposes. Instead, you want to open Vivado IP catalog, generate the FFT, and then look in the core's directory in the .srcs directory. There will be a C model in there.

 

 

Am I even asking the right questions?  I don't want to IMPLEMENT the FFT; I want to USE it.  I get the
impression from PG 109 that maybe the C Model is more about running on my development computer, when
what I care about is running on the target device (right now a Zedboard, but soon a ZC706).

Your understanding is correct, so in that case, you probably don't need the C model but you want to use the IP core itself. Using the IP is as simple as generating it in Vivado and instantiating it (using the instantiation template that's provided for you) in your HDL. You might find this guide helpful:

 

https://www.xilinx.com/support/documentation/sw_manuals/xilinx2015_4/ug939-vivado-designing-with-ip-tutorial.pdf

 

www.xilinx.com
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Xilinx Employee
Xilinx Employee
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Registered: ‎08-01-2008

Re: FFT v9.0 C-model

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cmodel generate with core generation . you can generate fft core from ip catalog and check generated file . you can find zip file . You not require to use HLS compiler. You can use any supported GCC compiler to run these models
Thanks and Regards
Balkrishan
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Explorer
Explorer
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Registered: ‎10-08-2016

Re: FFT v9.0 C-model

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I apologize if I'm using the wrong terminology.  Without using the word "model", here's what I need to do:

 

My colleague has implemented the FFT IP and I need to write an app that runs on the Zynq, generates some data, calls the FFT IP to do the transform, then collect the results for further processing.  I have the notion that there should be available somewhere some function definitions that embody the sequencing needed to make that happen.  How can I find those?

 

Now I'll use the word "model": is this C Model that I see referenced the code that I need to compile onto the Zynq for real-time processing?  I get the impression that it's a tool useful to the hardware implementer to simulate the implemented IP, and I don't think that's what I'm looking for.

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Xilinx Employee
Xilinx Employee
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Registered: ‎08-02-2011

Re: FFT v9.0 C-model

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My colleague has implemented the FFT IP and I need to write an app that runs on the Zynq, generates
some data, calls the FFT IP to do the transform, then collect the results for further processing. I
have the notion that there should be available somewhere some function definitions that embody the
sequencing needed to make that happen. How can I find those?

Well the FFT core doesn't have a native processor interface (i.e. AXI Lite) for controlling the FFT core or passing the data. It uses AXI Stream interfaces because its intended for continuous streaming data. What you would do for this type of setup is likely use AXI DMA cores to move the data. Here's a good example:

https://www.xilinx.com/support/answers/58582.html

 

The AXI DMA core is what you'd mostly interface with software and we provide drivers for that core. See the example for more.

 

Now I'll use the word "model": is this C Model that I see referenced the code that I need to compile
onto the Zynq for real-time processing? I get the impression that it's a tool useful to the
hardware implementer to simulate the implemented IP, and I don't think that's what I'm looking for.

 

Exactly, the C model is intended for use on your desktop (i.e. x86) for doing algorithm development. It's not intended to be used in embedded environment with real time data. It's pure software.

www.xilinx.com

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Explorer
Explorer
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Registered: ‎10-08-2016

Re: FFT v9.0 C-model

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That looks like something I can deal with.  Thanks so much for the link!

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Explorer
Explorer
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Registered: ‎10-08-2016

Re: FFT v9.0 C-model

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The link to AR 58582 was a huge help.  But the example code was based on a stand-alone example, and I'm doing this in a Linux environment.  Where can I find guidance on making that transition?  I've been doing everything so far on Petalinux.

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Observer
Observer
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Registered: ‎12-07-2016

Re: FFT v9.0 C-model

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hello, do you know how to run it in linux?

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Explorer
Explorer
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Registered: ‎10-08-2016

Re: FFT v9.0 C-model

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Not yet.  That's my goal for this week.

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