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Adventurer
Adventurer
3,296 Views
Registered: ‎05-26-2017

FSBL Fails to load FPGA bitstream from SD using PetaLinux 2018.1

Hi There !

 

Loading the same bitstream using PL2018.1 u-boot works well, as does loading the same bitstream using PL 2017.3 fsbl. However, using the latest and greatest I get this error 

 

Xilinx Zynq MP First Stage Boot Loader
Release 2018.1 Jun 7 2018 - 18:37:21
Reset Mode : System Reset
Platform: Silicon (4.0), Cluster ID 0x80000000
Running on A53-0 (64-bit) Processor, Device Name: XCZU3EG
Processor Initialization Done
================= In Stage 2 ============
SD1 Boot Mode
SD: rc= 0
File name is 1:/BOOT.BIN
Multiboot Reg : 0x0
Image Header Table Offset 0x8C0
*****Image Header Table Details********
Boot Gen Ver: 0x1020000
No of Partitions: 0x4
Partition Header Address: 0x440
Partition Present Device: 0x0
Initialization Success
======= In Stage 3, Partition No:1 =======
UnEncrypted data Length: 0x11A91F
Data word offset: 0x11A91F
Total Data word length: 0x11A91F
Destination Load Address: 0xFFFFFFFF
Execution Address: 0x0
Data word offset: 0x101C0
Partition Attributes: 0x26
Destination Device is PL, changing LoadAddress
Non authenticated Bitstream download to start now
DMA transfer done
XFSBL_ERROR_BITSTREAM_LOAD_FAIL
Partition 1 Load Failed, 0x37
================= In Stage Err ============
Fsbl Error Status: 0x0

 

Boot.bin is generated with the standard 

 

petalinux-package --boot --fsbl images/linux/zynqmp_fsbl.elf --u-boot images/linux/u-boot.elf --fpga ${default_bit} --force

 

Its interesting to note that if I program the same Boot.bin file to a QSPI32 device, it boots OK.. So this seems to have something to do with the boot mode. 

 

Any thoughts ? 

 

Thanks, 

 

/Otto

 

See Below for log of same boot.bin, but running of SPI

 

Xilinx Zynq MP First Stage Boot Loader
Release 2018.1 Jun 7 2018 - 18:37:21
Reset Mode : System Reset
Platform: Silicon (4.0), Cluster ID 0x80000000
Running on A53-0 (64-bit) Processor, Device Name: XCZU3EG
Processor Initialization Done
================= In Stage 2 ============
QSPI 24bit Boot Mode
QSPI is in single flash connection
QSPI is using 4 bit bus
FlashID=0x20 0xBB 0x20
MICRON 512M Bits
Multiboot Reg : 0x0
QSPI Reading Src 0x0, Dest FFFF1C40, Length EC0
.Image Header Table Offset 0x8C0
QSPI Reading Src 0x8C0, Dest FFFDD150, Length 40
.*****Image Header Table Details********
Boot Gen Ver: 0x1020000
No of Partitions: 0x4
Partition Header Address: 0x440
Partition Present Device: 0x0
QSPI Reading Src 0x1100, Dest FFFDD190, Length 40
.QSPI Reading Src 0x1140, Dest FFFDD1D0, Length 40
.QSPI Reading Src 0x1180, Dest FFFDD210, Length 40
.QSPI Reading Src 0x11C0, Dest FFFDD250, Length 40
.Initialization Success
======= In Stage 3, Partition No:1 =======
UnEncrypted data Length: 0x11A91F
Data word offset: 0x11A91F
Total Data word length: 0x11A91F
Destination Load Address: 0xFFFFFFFF
Execution Address: 0x0
Data word offset: 0x101C0
Partition Attributes: 0x26
QSPI Reading Src 0x40700, Dest 100000, Length 46A47C
.Destination Device is PL, changing LoadAddress
Non authenticated Bitstream download to start now
DMA transfer done
PL Configuration done successfully
Partition 1 Load Success
======= In Stage 3, Partition No:2 =======
UnEncrypted data Length: 0x31F4
Data word offset: 0x31F4
Total Data word length: 0x31F4
Destination Load Address: 0xFFFEA000
Execution Address: 0xFFFEA000
Data word offset: 0x12AAE0
Partition Attributes: 0x117
QSPI Reading Src 0x4AAB80, Dest FFFEA000, Length C7D0
.Partition 2 Load Success
======= In Stage 3, Partition No:3 =======
UnEncrypted data Length: 0x3788C
Data word offset: 0x3788C
Total Data word length: 0x3788C
Destination Load Address: 0x8000000
Execution Address: 0x8000000
Data word offset: 0x12DCE0
Partition Attributes: 0x114
QSPI Reading Src 0x4B7380, Dest 8000000, Length DE230
.Partition 3 Load Success
All Partitions Loaded
================= In Stage 4 ============
Protection configuration applied
Running Cpu Handoff address: 0xFFFEA000, Exec State: 0
Exit from FSBL
PMUFW: v1.0

 

 

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13 Replies
Highlighted
Explorer
Explorer
3,142 Views
Registered: ‎11-09-2015

Re: FSBL Fails to load FPGA bitstream from SD using PetaLinux 2018.1

hi @ottob

     have you solve  your problem ?

I have the same problem in xsdk 2018.1。The difference is i use xsdk bootgen  package boot.bin.

Here is my bif file.

 

//arch = zynqmp; split = false; format = BIN
the_ROM_image:
{
	[fsbl_config]a53_x64
	[bootloader]F:\vcu.sdk\fsbl\Debug\fsbl.elf
	[destination_device = pl]F:\vcu.sdk\zcu106_vcu_trd_wrapper_hw_platform_1\zcu106_vcu_trd_wrapper.bit
	[destination_cpu = a53-0, exception_level = el-2]F:\vcu.sdk\u-boot.elf
}

and i got the fsbl boot log:

 

 

Xilinx Zynq MP First Stage Boot Loader 
Release 2018.1   Aug 18 2018  -  08:52:01
Reset Mode      :       System Reset
Platform: Silicon (4.0), Cluster ID 0x80000000
Running on A53-0 (64-bit) Processor, Device Name: XCZU7EV
Processor Initialization Done 
================= In Stage 2 ============ 
SD1 with level shifter Boot Mode 
SD: rc= 0
File name is BOOT.BIN
Multiboot Reg : 0x0 
Image Header Table Offset 0x8C0 
*****Image Header Table Details******** 
Boot Gen Ver: 0x1020000 
No of Partitions: 0x3 
Partition Header Address: 0x440 
Partition Present Device: 0x0 
Initialization Success 
======= In Stage 3, Partition No:1 ======= 
UnEncrypted data Length: 0x49AA7D 
Data word offset: 0x49AA7D 
Total Data word length: 0x49AA7D 
Destination Load Address: 0xFFFFFFFF 
Execution Address: 0x0 
Data word offset: 0x92F0 
Partition Attributes: 0x26 
Destination Device is PL, changing LoadAddress
Non authenticated Bitstream download to start now
DMA transfer done 
XFSBL_ERROR_BITSTREAM_LOAD_FAIL
Partition 1 Load Failed, 0x37
================= In Stage Err ============ 
Fsbl Error Status: 0x0

I have check the bitstream size in windows OS,it's size is 19311219 bytes.(0x126AA70)  (words: 0x49AA9C   != 0x49aa70),

 

bitstream_size.png

 

Any ideas?

 

BestRegards

HSQ

 

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Moderator
Moderator
3,128 Views
Registered: ‎12-04-2016

Re: FSBL Fails to load FPGA bitstream from SD using PetaLinux 2018.1

Hi

 

This might be because of Incorrect size of BOOT binary. Try programming BOOT binary with correct size parameter (0x2000000) and see if this error goes away?

 

 

Best Regards

Shabbir

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Explorer
Explorer
3,099 Views
Registered: ‎11-09-2015

Re: FSBL Fails to load FPGA bitstream from SD using PetaLinux 2018.1

hi @shabbirk

     i have try use vivado's hardware manager to program the bitstream.

I got those tcl log:

open_hw_target
INFO: [Labtoolstcl 44-466] Opening hw_target localhost:3121/xilinx_tcf/Xilinx/89043A
open_hw_target: Time (s): cpu = 00:00:08 ; elapsed = 00:00:16 . Memory (MB): peak = 7080.742 ; gain = 0.000 ; free physical = 108 ; free virtual = 9459
set_property PROGRAM.FILE {/home/zynq/project/IPI/ZCU104/remove_vcu/vcu.runs/impl_2/zcu106_vcu_trd_wrapper.bit} [get_hw_devices xczu7_0]
current_hw_device [get_hw_devices xczu7_0]
refresh_hw_device -update_hw_probes false [lindex [get_hw_devices xczu7_0] 0]
INFO: [Labtools 27-1435] Device xczu7 (JTAG device index = 0) is not programmed (DONE status = 0).
current_hw_device [get_hw_devices arm_dap_1]
refresh_hw_device -update_hw_probes false [lindex [get_hw_devices arm_dap_1] 0]
current_hw_device [get_hw_devices xczu7_0]
set_property PROBES.FILE {} [get_hw_devices xczu7_0]
set_property FULL_PROBES.FILE {} [get_hw_devices xczu7_0]
set_property PROGRAM.FILE {/home/zynq/project/IPI/ZCU104/remove_vcu/vcu.runs/impl_2/zcu106_vcu_trd_wrapper.bit} [get_hw_devices xczu7_0]
program_hw_devices [get_hw_devices xczu7_0]
INFO: [Labtools 27-3164] End of startup status: HIGH
program_hw_devices: Time (s): cpu = 00:00:18 ; elapsed = 00:00:17 . Memory (MB): peak = 7080.742 ; gain = 0.000 ; free physical = 133 ; free virtual = 9459
refresh_hw_device [lindex [get_hw_devices xczu7_0] 0]
INFO: [Labtools 27-1434] Device xczu7 (JTAG device index = 0) is programmed with a design that has no supported debug core(s) in it.

 but the board‘s  status leds(DS1  red,DS35 red)

 

ds1.png

ds35.png

  Any suggestion?

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Adventurer
Adventurer
3,091 Views
Registered: ‎05-26-2017

Re: FSBL Fails to load FPGA bitstream from SD using PetaLinux 2018.1

I have not done any more work on this actually, although my suspicion is that there is something broken with booting from SD1 (SD0 works well on our old boards using 2018.1 & 2018.2). Could be wrong though 

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Moderator
Moderator
3,085 Views
Registered: ‎04-24-2017

Re: FSBL Fails to load FPGA bitstream from SD using PetaLinux 2018.1

Hi @ottob,

 

I don't see pmufw image included in your BOOT.BIN 

petalinux-package --boot --fsbl images/linux/zynqmp_fsbl.elf --u-boot images/linux/u-boot.elf --fpga ${default_bit} --force 

 

Right usage.

 

$ petalinux-package --boot --format BIN --fsbl images/linux/zynqmp_fsbl.elf --u-boot images/linux/u-boot.elf --pmufw images/linux/pmufw.elf --fpga images/linux/system.bit --force
Thanks,
Sandeep
PetaLinux Yocto | Embedded SW Support

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Adventurer
Adventurer
3,080 Views
Registered: ‎05-26-2017

Re: FSBL Fails to load FPGA bitstream from SD using PetaLinux 2018.1

Hi Sandeep !

 

Good catch, I'll give that a try

 

Thanks, 

 

/Otto

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Observer jfranz-argo
Observer
2,867 Views
Registered: ‎05-04-2018

Re: FSBL Fails to load FPGA bitstream from SD using PetaLinux 2018.1

Otto,

 

Did you ever resolve this issue? I'm having a very similar one.

 

Thanks,

Josh

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Explorer
Explorer
2,850 Views
Registered: ‎10-09-2017

Re: FSBL Fails to load FPGA bitstream from SD using PetaLinux 2018.1

I work on petalinux 2018.2, it boot fine

below is  my package:

 

liwenz@ubuntu:~/pro/he/images/linux$ petalinux-package --boot --fsbl zynq_fsbl.elf --fpga system.bit --u-boot

INFO: File in BOOT BIN:"/home/liwenz/pro/he/images/linux/zynq_fsbl.elf"

INFO: File in BOOT BIN: "/home/liwenz/pro/he/images/linux/system.bit"

INFO: File in BOOT BIN: "/home/liwenz/pro/he/images/linux/u-boot.elf"

INFO: Generating zynq binary package BOOT.BIN...

****** Xilinx Bootgen v2018.2  

**** Build date : Jun 14 2018-20:09:18    

** Copyright 1986-2018 Xilinx, Inc. All Rights Reserved.

INFO: Binary is ready.

liwenz@ubuntu:~/pro/he/images/linux$  

 

then copy the files: BOOT.BIN and image.ub  to a formated FAT32 SD card.

I also boot fine on QSPI in different way.

 

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Observer filipesalgado
Observer
2,814 Views
Registered: ‎02-23-2018

Re: FSBL Fails to load FPGA bitstream from SD using PetaLinux 2018.1

Hello guys,

 

any developments on this subject?

 

I'm having the same problem, but without linux, just on a bare metal fsbl.

 

================= In Stage 2 ============ 

SD1 Boot Mode 

SD: rc= 0

File name is 1:/BOOT.BIN
Multiboot Reg : 0x0 

Image Header Table Offset 0x8C0 

*****Image Header Table Details******** 

Boot Gen Ver: 0x1020000 

No of Partitions: 0x3 

Partition Header Address: 0x440 

Partition Present Device: 0x0 

Initialization Success 

======= In Stage 3, Partition No:1 ======= 

UnEncrypted data Length: 0x19301C 

Data word offset: 0x19301C 

Total Data word length: 0x19301C 

Destination Load Address: 0xFFFFFFFF 

Execution Address: 0x0 

Data word offset: 0x7AC0 

Partition Attributes: 0x26 

Destination Device is PL, changing LoadAddress
Non authenticated Bitstream download to start now
DMA transfer done 
XFSBL_ERROR_BITSTREAM_LOAD_FAIL
Partition 1 Load Failed, 0x37

================= In Stage Err ============ 

Fsbl Error Status: 0x0

 

When I create a boot image to my project with an "unmodified" FSBL project, the system boots correctly. However, after using the XFsbl_HookBeforeBSDownload or the  XFsbl_HookAfterBSDownload to init an external clock throught IIC, I get this error.

 

When using JTAG everything works fine, and this process has been used before with success.

 

Any hints?

 

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Observer filipesalgado
Observer
2,428 Views
Registered: ‎02-23-2018

Re: FSBL Fails to load FPGA bitstream from SD using PetaLinux 2018.1

Hi,

 

I've found the cause and solved this.

So, I was using a dedicated bsp to the FSBL application project.

After setting the FSBL application project to use the same bsp than the application project, all worked correctly.
Maybe, conflicts with memory region sizes defined in the two application's ldscripts.ld where causing the bitstream region to be overwritten.

 

Hope this helps someone.

Cheers

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Adventurer
Adventurer
1,609 Views
Registered: ‎09-28-2018

Re: FSBL Fails to load FPGA bitstream from SD using PetaLinux 2018.1

Is there any light in this discussion? I'm experiencing my own sililar troubles with SD cards. 

 

One of the suspects in this issue might be the USB cache buffer on your PC which are fairly good. 

Once in a while I have bad images of the Boot.bin, the Linux image or system.dtb. which causes various of random failures during the boot. Another compilation might work like a charm or so it seems.

As said here in this post by some QSPI works fine so it must be the method of installing the boot files onto the SD.  That's why I included a sha1sum check in my script ( before writing to SD and after ) but it does not fail even when the images are broken and a normal boot is not possible. 

Conclusion: Or the compilation does fail from time to time or the cache is playing its tricks. 

I now use following command now to wite my files to disk ( I need to test it further, early days) : 

 

sudo rsync -rltzuv "${1}" /mnt/boot/ && sync && sleep 2 && echo 3 | sudo tee /proc/sys/vm/drop_caches

 

Where is ${1} is the file to copy

This is my failing FSBL

Xilinx Zynq MP First Stage Boot Loader 

Release 2018.2   Feb 14 2019  -  16:37:54

Reset Mode\0x09:\0x09System Reset

Platform: Silicon (4.0), Cluster ID 0x80000000

Running on A53-0 (64-bit) Processor, Device Name: XCZU7EV

Processor Initialization Done 

=========== In Stage 2 ============ 

SD1 with level shifter Boot Mode 
SD: rc= 0

File name is 1:/BOOT.BIN
Multiboot Reg : 0x0 
Image Header Table Offset 0x8C0 

*****Image Header Table Details******** 

Boot Gen Ver: 0x1020000 
No of Partitions: 0x4 
Partition Header Address: 0x440 
Partition Present Device: 0x0 
Initialization Success 

======= In Stage 3, Partition No:1 ======= 

UnEncrypted data Length: 0x49AA7D 

Data word offset: 0x49AA7D 

Total Data word length: 0x49AA7D 

Destination Load Address: 0xFFFFFFFF 

Execution Address: 0x0 

Data word offset: 0xF530 

Partition Attributes: 0x26 

Destination Device is PL, changing LoadAddress

Non authenticated Bitstream download to start now
DMA transfer done 
XFSBL_ERROR_BITSTREAM_LOAD_FAIL
Partition 1 Load Failed, 0x37

================= In Stage Err ============ 

Fsbl Error Status: 0x0

 

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Visitor alen_wp
Visitor
544 Views
Registered: ‎05-30-2019

Re: FSBL Fails to load FPGA bitstream from SD using PetaLinux 2018.1

hello @ottob @deville @filipesalgado @liwenz @jfranz-argo ,

       i'm sorry to interrupt you, could you tell me how to config FSBL to realise "Non authenticated Bitstream download "  ?

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Explorer
Explorer
529 Views
Registered: ‎10-09-2017

Re: FSBL Fails to load FPGA bitstream from SD using PetaLinux 2018.1

If you use the same BOOT.BIN, you could not boot from QSPI and SD. 

Before petalinux-build , you should petalinux-config for them different. 

See ug1167 page82 for qspi.  

You choose boot from sd or qspi only one once.

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