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Registered: ‎05-30-2015

How to set up the FIQ

Hi

 

Can anyone help me please?

 

I am trying to write an FIQ driver with petalinux 2014.4. My first step is one that counts timer interrupts so I have looked at lots of sites and come up with the code below. When I use insmod to load my driver the system crashes and I can’t see why.

 

If anyone can see what I am doing wrong it would be of great help

 

Thank you

 

 

////////////////////////////////////////////////////////////////////////////////////////////

/////////////////////////////////// Driver function ///////////////////////////////

///////////////////////////////////////////////////////////////////////////////////////////

 

#define TIMER_TCSR0    0x42810000       // address of timer 0's control and status register

#define TIMER_TLR0       0x42810004       // address of timer 0's load register

#define TIMER_TCR0       0x42810008       // address of timer 0's counter register

#define LOAD_VAL         0xE2329AFF      

unsigned long *pTIMER_TCSR0;              // pointer to timer 0 control and status register

unsigned long *pTIMER_TLR0;                  // pointer to timer 0 load register

unsigned long *pTIMER_TCR0;                // pointer to timer 0 counter register

 

static struct fiq_handler fh       = { .name = "drv" };

static int               intcount = 0;

 

 

static int __init drv_init(void)

{

 

:                                               :                                               :

:                                               :                                               :

 

       

       if (claim_fiq(&fh))

       {

           printk(KERN_ALERT "claim_fiq failed\n");

       }

       else

       {

           printk(KERN_ALERT "claim_fiq OK\n");

       }

 

       /* Map timer register addresses and size to pointers */

       pTIMER_TCSR0 = ioremap_nocache(TIMER_TCSR0,0x4);     /* map timer 0 control and status register */

       pTIMER_TLR0 = ioremap_nocache(TIMER_TLR0,0x4);        /* map timer 0 load register              */

       pTIMER_TCR0 = ioremap_nocache(TIMER_TCR0,0x4);     /* map timer 0 count register             */

 

 

       /* Set up the FIQ reg's */

       get_fiq_regs(&fiqregs);

       fiqregs.ARM_r8 = &intcount;             /* Load address of Counter*/

       fiqregs.ARM_r9 = pTIMER_TCSR0;

       set_fiq_regs(&fiqregs);

 

       set_fiq_handler(&fiq, &fiq_end - &fiq);

 

       enable_fiq((28));   /*The FIQ Is PO FIQ number 28  */      

 

       /* Write values to timer registers to set it up */

       iowrite32(LOAD_VAL, pTIMER_TLR0);                   /* place load value in load register */

       temp = ioread32(pTIMER_TLR0);                          /* debug: read load value to check   */

       iowrite32(0x000000B0, pTIMER_TCSR0);            /* load TLR */

       iowrite32(0x000000D0, pTIMER_TCSR0);           /* Generate mode,downcounter,reload generate */

 

       /* set interrupt count to 0 */

       intcount = 0;                                      

 

       return 0;

}

 

 

 

 

/////////////////////////////////////////////////////////////////////////////////////////////////

/////////////////////////////////// Assembler function ////////////////////////////

/////////////////////////////////////////////////////////////////////////////////////////////////

 

#include <linux/linkage.h>

#include <asm/assembler.h>

                                                .text

                                                .global fiq

                                                .global fiq_end

ENTRY(fiq)

                                                /* Clear timer IRQ (pTIMER_TCSR0) by oring with T0INT */

                                                LDR r10, [r9];

                                                ORR r10, r10, #0x00000100;

                                                STR r10, [r9];

                                                /* Increment the counter (intcount++) */

                                                LDR r10, [r8];

                                                ADD r10, #1;

                                                STR r10, [r8];

                                                /* Return from the routine */

                                                SUBS pc, lr, #4;

fiq_end:

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