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Contributor
Contributor
2,661 Views
Registered: ‎04-14-2011

Linux Driver for FSL fifo and device tree description

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Hello, we have Linux kernel 3.3 running on top of Microblaze and we have a custom IP core connected to microblaze via FSL fifo there was an obsolete FSL driver in kernel 2.4 which became depreciated on later kernels. is there a driver code for FSL that can run on 2.6 and plus kernels? the same goes for the description of FSL fifio in device tree, since Xilinx's SDK device tree generator does not detected FSL fifo Best Regards,
Best Regards,
B.Romanous
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1 Solution

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Contributor
Contributor
3,200 Views
Registered: ‎04-14-2011

Re: Linux Driver for FSL fifo and device tree description

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I attached the FSL driver code, thanks to "amoralesv" who provided the code and the guidlines to use it:

 

 

Copy and unrar the file in the following folder: /your_linux_installed_directory/linux-2.6-xlnx/drivers/misc/

Also in this folder, you need to edit the Kconfig file and add the following lines:

 

config MICROBLAZE_FSLFIFO
        tristate  'FSL FIFO driver'

 

after the text "if MISC_DEVICES"

 

Also, add the following text almost at the end of Kconfig file:

source "drivers/misc/fslfifo/Kconfig"

 

before the text "endif # MISC_DEVICES"

 

Additionaly, add the following line at the end of the Makefile in folder I mentioned before:

obj-$(CONFIG_MICROBLAZE_FSLFIFO) += fslfifo/

 

And I think that's it. Please note that in fslfifo.c you must adjust the following:

static unsigned fslchannels = 8;     // change it to the actual number of fsl fifos in your design

 

Just one think for the fsl driver: one fslfifo is read/write, so actually is the same as 2 FSLs fifos (one pair, i.e. one link, one fifo towards MicroBlaze, and the other coming from MicroBlaze) in EDK.

 

Also, adjust in fslfifo.c the following:

#define FSLFIFO_BUF_SIZE 2048   // it is the default, enables 512 words of 32 bits, or 2048 bytes

 

to a value according to the depth of your fifo and the width of each word.

 

Last, but not least, you need to modify the xilinx_mmu_defconfig to enable the generation of as many fslfifos you need.

Here is an example:

 

#
# FSLFIFO channel selection
#
CONFIG_MICROBLAZE_FSLFIFO0=y
CONFIG_MICROBLAZE_FSLFIFO1=y
#CONFIG_MICROBLAZE_FSLFIFO2=y
#CONFIG_MICROBLAZE_FSLFIFO3=y
#CONFIG_MICROBLAZE_FSLFIFO4=y
#CONFIG_MICROBLAZE_FSLFIFO5=y
#CONFIG_MICROBLAZE_FSLFIFO6=y
#CONFIG_MICROBLAZE_FSLFIFO7=y

where I have only 2 fslfifos enable and should match the FSL fifos in EDK (4 in this case, taken in pairs, so 2 pairs), then at boot you will see that there are 2 fslfifos enabled. Also note that your xilinx_mmu_defconfig should match your hardware design in EDK, for MicroBlaze, ICAP, Ehernet, etc.

Best Regards,
B.Romanous
0 Kudos
1 Reply
Contributor
Contributor
3,201 Views
Registered: ‎04-14-2011

Re: Linux Driver for FSL fifo and device tree description

Jump to solution

I attached the FSL driver code, thanks to "amoralesv" who provided the code and the guidlines to use it:

 

 

Copy and unrar the file in the following folder: /your_linux_installed_directory/linux-2.6-xlnx/drivers/misc/

Also in this folder, you need to edit the Kconfig file and add the following lines:

 

config MICROBLAZE_FSLFIFO
        tristate  'FSL FIFO driver'

 

after the text "if MISC_DEVICES"

 

Also, add the following text almost at the end of Kconfig file:

source "drivers/misc/fslfifo/Kconfig"

 

before the text "endif # MISC_DEVICES"

 

Additionaly, add the following line at the end of the Makefile in folder I mentioned before:

obj-$(CONFIG_MICROBLAZE_FSLFIFO) += fslfifo/

 

And I think that's it. Please note that in fslfifo.c you must adjust the following:

static unsigned fslchannels = 8;     // change it to the actual number of fsl fifos in your design

 

Just one think for the fsl driver: one fslfifo is read/write, so actually is the same as 2 FSLs fifos (one pair, i.e. one link, one fifo towards MicroBlaze, and the other coming from MicroBlaze) in EDK.

 

Also, adjust in fslfifo.c the following:

#define FSLFIFO_BUF_SIZE 2048   // it is the default, enables 512 words of 32 bits, or 2048 bytes

 

to a value according to the depth of your fifo and the width of each word.

 

Last, but not least, you need to modify the xilinx_mmu_defconfig to enable the generation of as many fslfifos you need.

Here is an example:

 

#
# FSLFIFO channel selection
#
CONFIG_MICROBLAZE_FSLFIFO0=y
CONFIG_MICROBLAZE_FSLFIFO1=y
#CONFIG_MICROBLAZE_FSLFIFO2=y
#CONFIG_MICROBLAZE_FSLFIFO3=y
#CONFIG_MICROBLAZE_FSLFIFO4=y
#CONFIG_MICROBLAZE_FSLFIFO5=y
#CONFIG_MICROBLAZE_FSLFIFO6=y
#CONFIG_MICROBLAZE_FSLFIFO7=y

where I have only 2 fslfifos enable and should match the FSL fifos in EDK (4 in this case, taken in pairs, so 2 pairs), then at boot you will see that there are 2 fslfifos enabled. Also note that your xilinx_mmu_defconfig should match your hardware design in EDK, for MicroBlaze, ICAP, Ehernet, etc.

Best Regards,
B.Romanous
0 Kudos