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Visitor
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Registered: ‎03-31-2019

Linux hangs at "bootconsole [cdns0] disabled" when I try Xilinx Answer 72076

I follow the steps in Xilinx Answer 72076 using Vivado 2018.2 and Petalinux 2018.2. This is my block design:QQ截图20190605193833.png

 

 

 

 

 

 

 

 

 

When BOOT.BIN and image.ub are generated, I copied them to a SD card and power on my ZCU106. When Linux boots, the system hangs at "bootconsole [cdns0] disabled". Does anyone know why? Thank you!

The log is as follows:

Xilinx Zynq MP First Stage Boot Loader
Release 2019.1 May 25 2019 - 07:43:50
NOTICE: ATF running on XCZU7EV/silicon v4/RTL5.1 at 0xfffea000
NOTICE: BL31: Secure code at 0x0
NOTICE: BL31: Non secure code at 0x8000000
NOTICE: BL31: v1.4(release):xilinx-v2018.1-4-g93a69a5a
NOTICE: BL31: Built : 06:50:51, Jun 5 2019
PMUFW: v1.0


U-Boot 2018.01 (Jun 05 2019 - 14:51:40 +0800) Xilinx ZynqMP ZCU102 rev1.0

I2C: ready
DRAM: 4 GiB
usb dr_mode not found
EL Level: EL2
Chip ID: zu7ev
MMC: sdhci@ff170000: 0 (SD)
SF: Detected n25q512a with page size 512 Bytes, erase size 128 KiB, total 128 MiB
*** Warning - bad CRC, using default environment

In: serial@ff000000
Out: serial@ff000000
Err: serial@ff000000
Board: Xilinx ZynqMP
Bootmode: LVL_SHFT_SD_MODE1
Net: ZYNQ GEM: ff0e0000, phyaddr ffffffff, interface rgmii-id
eth0: ethernet@ff0e0000
U-BOOT for zcu106_rc1

ethernet@ff0e0000 Waiting for PHY auto negotiation to complete......................................... TIMEOUT !
Hit any key to stop autoboot: 0
Device: sdhci@ff170000
Manufacturer ID: 3
OEM: 5344
Name: SL16G
Tran Speed: 100000000
Rd Block Len: 512
SD version 3.0
High Capacity: Yes
Capacity: 14.8 GiB
Bus Width: 4-bit
Erase Group Size: 512 Bytes
reading image.ub
15325436 bytes read in 1004 ms (14.6 MiB/s)
## Loading kernel from FIT Image at 10000000 ...
Using 'conf@system-top.dtb' configuration
Trying 'kernel@1' kernel subimage
Description: Linux kernel
Type: Kernel Image
Compression: gzip compressed
Data Start: 0x10000104
Data Size: 7004065 Bytes = 6.7 MiB
Architecture: AArch64
OS: Linux
Load Address: 0x00080000
Entry Point: 0x00080000
Hash algo: sha1
Hash value: b8e8f7a81e740565bf36ff5e68f522f2a334cf9c
Verifying Hash Integrity ... sha1+ OK
## Loading ramdisk from FIT Image at 10000000 ...
Using 'conf@system-top.dtb' configuration
Trying 'ramdisk@1' ramdisk subimage
Description: petalinux-user-image
Type: RAMDisk Image
Compression: gzip compressed
Data Start: 0x106b5f70
Data Size: 8287227 Bytes = 7.9 MiB
Architecture: AArch64
OS: Linux
Load Address: unavailable
Entry Point: unavailable
Hash algo: sha1
Hash value: 992cd827e245aa754cd1c2390fab480f2e8d104e
Verifying Hash Integrity ... sha1+ OK
## Loading fdt from FIT Image at 10000000 ...
Using 'conf@system-top.dtb' configuration
Trying 'fdt@system-top.dtb' fdt subimage
Description: Flattened Device Tree blob
Type: Flat Device Tree
Compression: uncompressed
Data Start: 0x106ae1ac
Data Size: 31999 Bytes = 31.2 KiB
Architecture: AArch64
Hash algo: sha1
Hash value: 30dc872ebb59c28c02c8b8afca8cdfa465654753
Verifying Hash Integrity ... sha1+ OK
Booting using the fdt blob at 0x106ae1ac
Uncompressing Kernel Image ... OK
Loading Ramdisk to 07818000, end 07fff3fb ... OK
Loading Device Tree to 000000000780d000, end 0000000007817cfe ... OK

Starting kernel ...

[ 0.000000] Booting Linux on physical CPU 0x0
[ 0.000000] Linux version 4.14.0-xilinx-v2018.2 (oe-user@oe-host) (gcc version 7.2.0 (GCC)) #1 SMP Wed Jun 5 15:03:54 CST 2019
[ 0.000000] Boot CPU: AArch64 Processor [410fd034]
[ 0.000000] Machine model: xlnx,zynqmp
[ 0.000000] earlycon: cdns0 at MMIO 0x00000000ff000000 (options '115200n8')
[ 0.000000] bootconsole [cdns0] enabled
[ 0.000000] efi: Getting EFI parameters from FDT:
[ 0.000000] efi: UEFI not found.
[ 0.000000] cma: Reserved 256 MiB at 0x000000006fc00000
[ 0.000000] psci: probing for conduit method from DT.
[ 0.000000] psci: PSCIv1.1 detected in firmware.
[ 0.000000] psci: Using standard PSCI v0.2 function IDs
[ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
[ 0.000000] percpu: Embedded 21 pages/cpu @ffffffc87ff78000 s46488 r8192 d31336 u86016
[ 0.000000] Detected VIPT I-cache on CPU0
[ 0.000000] CPU features: enabling workaround for ARM erratum 845719
[ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1033987
[ 0.000000] Kernel command line: earlycon clk_ignore_unused
[ 0.000000] PID hash table entries: 4096 (order: 3, 32768 bytes)
[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes)
[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes)
[ 0.000000] software IO TLB [mem 0x6bc00000-0x6fc00000] (64MB) mapped at [ffffffc06bc00000-ffffffc06fbfffff]
[ 0.000000] Memory: 3776392K/4193280K available (10044K kernel code, 648K rwdata, 3144K rodata, 512K init, 2168K bss, 154744K reserved, 262144K cma-reserved)
[ 0.000000] Virtual kernel memory layout:
[ 0.000000] modules : 0xffffff8000000000 - 0xffffff8008000000 ( 128 MB)
[ 0.000000] vmalloc : 0xffffff8008000000 - 0xffffffbebfff0000 ( 250 GB)
[ 0.000000] .text : 0xffffff8008080000 - 0xffffff8008a50000 ( 10048 KB)
[ 0.000000] .rodata : 0xffffff8008a50000 - 0xffffff8008d70000 ( 3200 KB)
[ 0.000000] .init : 0xffffff8008d70000 - 0xffffff8008df0000 ( 512 KB)
[ 0.000000] .data : 0xffffff8008df0000 - 0xffffff8008e92200 ( 649 KB)
[ 0.000000] .bss : 0xffffff8008e92200 - 0xffffff80090b0330 ( 2169 KB)
[ 0.000000] fixed : 0xffffffbefe7fd000 - 0xffffffbefec00000 ( 4108 KB)
[ 0.000000] PCI I/O : 0xffffffbefee00000 - 0xffffffbeffe00000 ( 16 MB)
[ 0.000000] vmemmap : 0xffffffbf00000000 - 0xffffffc000000000 ( 4 GB maximum)
[ 0.000000] 0xffffffbf00000000 - 0xffffffbf1dc00000 ( 476 MB actual)
[ 0.000000] memory : 0xffffffc000000000 - 0xffffffc880000000 ( 34816 MB)
[ 0.000000] Hierarchical RCU implementation.
[ 0.000000] RCU event tracing is enabled.
[ 0.000000] RCU restricting CPUs from NR_CPUS=8 to nr_cpu_ids=4.
[ 0.000000] RCU: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=4
[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
[ 0.000000] GIC: Adjusting CPU interface base to 0x00000000f902f000
[ 0.000000] GIC: Using split EOI/Deactivate mode
[ 0.000000] arch_timer: cp15 timer(s) running at 99.99MHz (phys).
[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x170f8de2d3, max_idle_ns: 440795206112 ns
[ 0.000003] sched_clock: 56 bits at 99MHz, resolution 10ns, wraps every 4398046511101ns
[ 0.008252] Console: colour dummy device 80x25
[ 0.012508] console [tty0] enabled
[ 0.015875] bootconsole [cdns0] disabled

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Highlighted
Visitor
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Registered: ‎03-31-2019

Re: Linux hangs at "bootconsole [cdns0] disabled" when I try Xilinx Answer 72076

Someone help please

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Explorer
Explorer
899 Views
Registered: ‎11-22-2018

Re: Linux hangs at "bootconsole [cdns0] disabled" when I try Xilinx Answer 72076

try:
bootargs=console=ttyPS0,115200 earlycon clk_ignore_unused earlyprintk

or:

close CPU idle as https://www.xilinx.com/support/answers/69143.html

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Visitor
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Registered: ‎03-31-2019

Re: Linux hangs at "bootconsole [cdns0] disabled" when I try Xilinx Answer 72076

Thank you for your reply! Sadly, it didn't work.

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Moderator
Moderator
662 Views
Registered: ‎12-04-2016

Re: Linux hangs at "bootconsole [cdns0] disabled" when I try Xilinx Answer 72076

Hi @xying 

How did you packaged BOOT.bin? Have you added bitfile to it while generating it?

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Visitor
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Registered: ‎03-31-2019

Re: Linux hangs at "bootconsole [cdns0] disabled" when I try Xilinx Answer 72076

Hi Shabbirk! Thank you for your reply.

I used the following command to package a boot.bin file as Xilinx_Answer_72076 did:

"petalinux-package --boot --fsbl <fsbl path> --u-boot <u-boot path> --pmufw <pmufw path> --atf <atf path> --fpga <bitstream path>"

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Observer
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Registered: ‎03-18-2009

Re: Linux hangs at "bootconsole [cdns0] disabled" when I try Xilinx Answer 72076

Any update about this issue?

Thanks,

Annalisa

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Explorer
Explorer
80 Views
Registered: ‎05-25-2016

Re: Linux hangs at "bootconsole [cdns0] disabled" when I try Xilinx Answer 72076

I am also stuck on this issue using petalinux and vivado 2019.2 - any updates I have the exact same problem and used the zedboard presets in vivado.  I'm using uart1 and my device tree (decompiled) is attached.

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Moderator
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Registered: ‎04-24-2017

Re: Linux hangs at "bootconsole [cdns0] disabled" when I try Xilinx Answer 72076

Hi @m3atwad ,

In petalinux-config you need to select Primary stdin/stdout as psu_uart_1 if you need uart1 as your serial console.

$ petalinux-config  → Subsystem AUTO Hardware Settings → Serial Settings → Primary stdin/stdout (psu_uart_1)
Thanks,
Sandeep
PetaLinux Yocto | Embedded SW Support

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Explorer
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Registered: ‎05-25-2016

Re: Linux hangs at "bootconsole [cdns0] disabled" when I try Xilinx Answer 72076

Hi Sandeep!  Thank you for the response!

I have that set alread - is this what you meant?  Please see attached screenshot.

8.jpg
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Explorer
Explorer
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Registered: ‎05-25-2016

Re: Linux hangs at "bootconsole [cdns0] disabled" when I try Xilinx Answer 72076

My device tree (resulting from /images/linux after running a build) seems to reflect serial port 'serial0' pointing to uart1 which seems to make sense as well and this matches my hardware design.  In the zynq vivado properties gui uart0 is unchecked and uart1 is checked.  See below:

- do you know where to turn on the printk timestamp option in the petalinux GUI?  I saw someone on the forums mentioned that was good to do to ensure that the configs were being pulled in to the petalinux build system.

/dts-v1/;

/ {
	#address-cells = <0x1>;
	#size-cells = <0x1>;
	compatible = "xlnx,zynq-7000";

	cpus {
		#address-cells = <0x1>;
		#size-cells = <0x0>;

		cpu@0 {
			compatible = "arm,cortex-a9";
			device_type = "cpu";
			reg = <0x0>;
			clocks = <0x1 0x3>;
			clock-latency = <0x3e8>;
			cpu0-supply = <0x2>;
			operating-points = <0xa2c2a 0xf4240 0x51615 0xf4240>;
		};

		cpu@1 {
			compatible = "arm,cortex-a9";
			device_type = "cpu";
			reg = <0x1>;
			clocks = <0x1 0x3>;
		};
	};

	fpga-full {
		compatible = "fpga-region";
		fpga-mgr = <0x3>;
		#address-cells = <0x1>;
		#size-cells = <0x1>;
		ranges;
	};

	pmu@f8891000 {
		compatible = "arm,cortex-a9-pmu";
		interrupts = <0x0 0x5 0x4 0x0 0x6 0x4>;
		interrupt-parent = <0x4>;
		reg = <0xf8891000 0x1000 0xf8893000 0x1000>;
	};

	fixedregulator {
		compatible = "regulator-fixed";
		regulator-name = "VCCPINT";
		regulator-min-microvolt = <0xf4240>;
		regulator-max-microvolt = <0xf4240>;
		regulator-boot-on;
		regulator-always-on;
		phandle = <0x2>;
	};

	amba {
		u-boot,dm-pre-reloc;
		compatible = "simple-bus";
		#address-cells = <0x1>;
		#size-cells = <0x1>;
		interrupt-parent = <0x4>;
		ranges;

		adc@f8007100 {
			compatible = "xlnx,zynq-xadc-1.00.a";
			reg = <0xf8007100 0x20>;
			interrupts = <0x0 0x7 0x4>;
			interrupt-parent = <0x4>;
			clocks = <0x1 0xc>;
		};

		can@e0008000 {
			compatible = "xlnx,zynq-can-1.0";
			status = "disabled";
			clocks = <0x1 0x13 0x1 0x24>;
			clock-names = "can_clk", "pclk";
			reg = <0xe0008000 0x1000>;
			interrupts = <0x0 0x1c 0x4>;
			interrupt-parent = <0x4>;
			tx-fifo-depth = <0x40>;
			rx-fifo-depth = <0x40>;
		};

		can@e0009000 {
			compatible = "xlnx,zynq-can-1.0";
			status = "disabled";
			clocks = <0x1 0x14 0x1 0x25>;
			clock-names = "can_clk", "pclk";
			reg = <0xe0009000 0x1000>;
			interrupts = <0x0 0x33 0x4>;
			interrupt-parent = <0x4>;
			tx-fifo-depth = <0x40>;
			rx-fifo-depth = <0x40>;
		};

		gpio@e000a000 {
			compatible = "xlnx,zynq-gpio-1.0";
			#gpio-cells = <0x2>;
			clocks = <0x1 0x2a>;
			gpio-controller;
			interrupt-controller;
			#interrupt-cells = <0x2>;
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x14 0x4>;
			reg = <0xe000a000 0x1000>;
			emio-gpio-width = <0x40>;
			gpio-mask-high = <0x0>;
			gpio-mask-low = <0x5600>;
		};

		i2c@e0004000 {
			compatible = "cdns,i2c-r1p10";
			status = "disabled";
			clocks = <0x1 0x26>;
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x19 0x4>;
			reg = <0xe0004000 0x1000>;
			#address-cells = <0x1>;
			#size-cells = <0x0>;
		};

		i2c@e0005000 {
			compatible = "cdns,i2c-r1p10";
			status = "disabled";
			clocks = <0x1 0x27>;
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x30 0x4>;
			reg = <0xe0005000 0x1000>;
			#address-cells = <0x1>;
			#size-cells = <0x0>;
		};

		interrupt-controller@f8f01000 {
			compatible = "arm,cortex-a9-gic";
			#interrupt-cells = <0x3>;
			interrupt-controller;
			reg = <0xf8f01000 0x1000 0xf8f00100 0x100>;
			num_cpus = <0x2>;
			num_interrupts = <0x60>;
			phandle = <0x4>;
		};

		cache-controller@f8f02000 {
			compatible = "arm,pl310-cache";
			reg = <0xf8f02000 0x1000>;
			interrupts = <0x0 0x2 0x4>;
			arm,data-latency = <0x3 0x2 0x2>;
			arm,tag-latency = <0x2 0x2 0x2>;
			cache-unified;
			cache-level = <0x2>;
		};

		memory-controller@f8006000 {
			compatible = "xlnx,zynq-ddrc-a05";
			reg = <0xf8006000 0x1000>;
		};

		ocmc@f800c000 {
			compatible = "xlnx,zynq-ocmc-1.0";
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x3 0x4>;
			reg = <0xf800c000 0x1000>;
		};

		serial@e0000000 {
			compatible = "xlnx,xuartps", "cdns,uart-r1p8";
			status = "disabled";
			clocks = <0x1 0x17 0x1 0x28>;
			clock-names = "uart_clk", "pclk";
			reg = <0xe0000000 0x1000>;
			interrupts = <0x0 0x1b 0x4>;
		};

		serial@e0001000 {
			compatible = "xlnx,xuartps", "cdns,uart-r1p8";
			status = "okay";
			clocks = <0x1 0x18 0x1 0x29>;
			clock-names = "uart_clk", "pclk";
			reg = <0xe0001000 0x1000>;
			interrupts = <0x0 0x32 0x4>;
			cts-override;
			device_type = "serial";
			port-number = <0x0>;
		};

		spi@e0006000 {
			compatible = "xlnx,zynq-spi-r1p6";
			reg = <0xe0006000 0x1000>;
			status = "disabled";
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x1a 0x4>;
			clocks = <0x1 0x19 0x1 0x22>;
			clock-names = "ref_clk", "pclk";
			#address-cells = <0x1>;
			#size-cells = <0x0>;
		};

		spi@e0007000 {
			compatible = "xlnx,zynq-spi-r1p6";
			reg = <0xe0007000 0x1000>;
			status = "disabled";
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x31 0x4>;
			clocks = <0x1 0x1a 0x1 0x23>;
			clock-names = "ref_clk", "pclk";
			#address-cells = <0x1>;
			#size-cells = <0x0>;
		};

		spi@e000d000 {
			clock-names = "ref_clk", "pclk";
			clocks = <0x1 0xa 0x1 0x2b>;
			compatible = "xlnx,zynq-qspi-1.0";
			status = "okay";
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x13 0x4>;
			reg = <0xe000d000 0x1000>;
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			is-dual = <0x0>;
			num-cs = <0x1>;
			spi-rx-bus-width = <0x4>;
			spi-tx-bus-width = <0x4>;

			flash@0 {
				compatible = "n25q512a", "micron,m25p80", "jedec,spi-nor";
				reg = <0x0>;
				#address-cells = <0x1>;
				#size-cells = <0x1>;
				spi-max-frequency = <0x2faf080>;

				partition@0x00000000 {
					label = "boot";
					reg = <0x0 0x500000>;
				};

				partition@0x00500000 {
					label = "bootenv";
					reg = <0x500000 0x20000>;
				};

				partition@0x00520000 {
					label = "kernel";
					reg = <0x520000 0xa80000>;
				};

				partition@0x00fa0000 {
					label = "spare";
					reg = <0xfa0000 0x0>;
				};
			};
		};

		memory-controller@e000e000 {
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			status = "disabled";
			clock-names = "memclk", "apb_pclk";
			clocks = <0x1 0xb 0x1 0x2c>;
			compatible = "arm,pl353-smc-r2p1", "arm,primecell";
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x12 0x4>;
			ranges;
			reg = <0xe000e000 0x1000>;

			flash@e1000000 {
				status = "disabled";
				compatible = "arm,pl353-nand-r2p1";
				reg = <0xe1000000 0x1000000>;
				#address-cells = <0x1>;
				#size-cells = <0x1>;
			};

			flash@e2000000 {
				status = "disabled";
				compatible = "cfi-flash";
				reg = <0xe2000000 0x2000000>;
				#address-cells = <0x1>;
				#size-cells = <0x1>;
			};
		};

		ethernet@e000b000 {
			compatible = "cdns,zynq-gem", "cdns,gem";
			reg = <0xe000b000 0x1000>;
			status = "okay";
			interrupts = <0x0 0x16 0x4>;
			clocks = <0x1 0x1e 0x1 0x1e 0x1 0xd>;
			clock-names = "pclk", "hclk", "tx_clk";
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			phy-mode = "rgmii-id";
			xlnx,ptp-enet-clock = <0x69f6bcb>;
			local-mac-address = [00 0a 35 00 1e 53];
		};

		ethernet@e000c000 {
			compatible = "cdns,zynq-gem", "cdns,gem";
			reg = <0xe000c000 0x1000>;
			status = "disabled";
			interrupts = <0x0 0x2d 0x4>;
			clocks = <0x1 0x1f 0x1 0x1f 0x1 0xe>;
			clock-names = "pclk", "hclk", "tx_clk";
			#address-cells = <0x1>;
			#size-cells = <0x0>;
		};

		mmc@e0100000 {
			compatible = "arasan,sdhci-8.9a";
			status = "okay";
			clock-names = "clk_xin", "clk_ahb";
			clocks = <0x1 0x15 0x1 0x20>;
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x18 0x4>;
			reg = <0xe0100000 0x1000>;
			xlnx,has-cd = <0x1>;
			xlnx,has-power = <0x0>;
			xlnx,has-wp = <0x1>;
		};

		mmc@e0101000 {
			compatible = "arasan,sdhci-8.9a";
			status = "disabled";
			clock-names = "clk_xin", "clk_ahb";
			clocks = <0x1 0x16 0x1 0x21>;
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x2f 0x4>;
			reg = <0xe0101000 0x1000>;
		};

		slcr@f8000000 {
			u-boot,dm-pre-reloc;
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			compatible = "xlnx,zynq-slcr", "syscon", "simple-mfd";
			reg = <0xf8000000 0x1000>;
			ranges;
			phandle = <0x5>;

			clkc@100 {
				u-boot,dm-pre-reloc;
				#clock-cells = <0x1>;
				compatible = "xlnx,ps7-clkc";
				fclk-enable = <0x1>;
				clock-output-names = "armpll", "ddrpll", "iopll", "cpu_6or4x", "cpu_3or2x", "cpu_2x", "cpu_1x", "ddr2x", "ddr3x", "dci", "lqspi", "smc", "pcap", "gem0", "gem1", "fclk0", "fclk1", "fclk2", "fclk3", "can0", "can1", "sdio0", "sdio1", "uart0", "uart1", "spi0", "spi1", "dma", "usb0_aper", "usb1_aper", "gem0_aper", "gem1_aper", "sdio0_aper", "sdio1_aper", "spi0_aper", "spi1_aper", "can0_aper", "can1_aper", "i2c0_aper", "i2c1_aper", "uart0_aper", "uart1_aper", "gpio_aper", "lqspi_aper", "smc_aper", "swdt", "dbg_trc", "dbg_apb";
				reg = <0x100 0x100>;
				ps-clk-frequency = <0x1fca055>;
				phandle = <0x1>;
			};

			rstc@200 {
				compatible = "xlnx,zynq-reset";
				reg = <0x200 0x48>;
				#reset-cells = <0x1>;
				syscon = <0x5>;
			};

			pinctrl@700 {
				compatible = "xlnx,pinctrl-zynq";
				reg = <0x700 0x200>;
				syscon = <0x5>;
			};
		};

		dmac@f8003000 {
			compatible = "arm,pl330", "arm,primecell";
			reg = <0xf8003000 0x1000>;
			interrupt-parent = <0x4>;
			interrupt-names = "abort", "dma0", "dma1", "dma2", "dma3", "dma4", "dma5", "dma6", "dma7";
			interrupts = <0x0 0xd 0x4 0x0 0xe 0x4 0x0 0xf 0x4 0x0 0x10 0x4 0x0 0x11 0x4 0x0 0x28 0x4 0x0 0x29 0x4 0x0 0x2a 0x4 0x0 0x2b 0x4>;
			#dma-cells = <0x1>;
			#dma-channels = <0x8>;
			#dma-requests = <0x4>;
			clocks = <0x1 0x1b>;
			clock-names = "apb_pclk";
		};

		devcfg@f8007000 {
			compatible = "xlnx,zynq-devcfg-1.0";
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x8 0x4>;
			reg = <0xf8007000 0x100>;
			clocks = <0x1 0xc 0x1 0xf 0x1 0x10 0x1 0x11 0x1 0x12>;
			clock-names = "ref_clk", "fclk0", "fclk1", "fclk2", "fclk3";
			syscon = <0x5>;
			phandle = <0x3>;
		};

		efuse@f800d000 {
			compatible = "xlnx,zynq-efuse";
			reg = <0xf800d000 0x20>;
		};

		timer@f8f00200 {
			compatible = "arm,cortex-a9-global-timer";
			reg = <0xf8f00200 0x20>;
			interrupts = <0x1 0xb 0x301>;
			interrupt-parent = <0x4>;
			clocks = <0x1 0x4>;
		};

		timer@f8001000 {
			interrupt-parent = <0x4>;
			interrupts = <0x0 0xa 0x4 0x0 0xb 0x4 0x0 0xc 0x4>;
			compatible = "cdns,ttc";
			clocks = <0x1 0x6>;
			reg = <0xf8001000 0x1000>;
		};

		timer@f8002000 {
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x25 0x4 0x0 0x26 0x4 0x0 0x27 0x4>;
			compatible = "cdns,ttc";
			clocks = <0x1 0x6>;
			reg = <0xf8002000 0x1000>;
		};

		timer@f8f00600 {
			interrupt-parent = <0x4>;
			interrupts = <0x1 0xd 0x301>;
			compatible = "arm,cortex-a9-twd-timer";
			reg = <0xf8f00600 0x20>;
			clocks = <0x1 0x4>;
		};

		usb@e0002000 {
			compatible = "xlnx,zynq-usb-2.20a", "chipidea,usb2";
			status = "okay";
			clocks = <0x1 0x1c>;
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x15 0x4>;
			reg = <0xe0002000 0x1000>;
			phy_type = "ulpi";
		};

		usb@e0003000 {
			compatible = "xlnx,zynq-usb-2.20a", "chipidea,usb2";
			status = "disabled";
			clocks = <0x1 0x1d>;
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x2c 0x4>;
			reg = <0xe0003000 0x1000>;
			phy_type = "ulpi";
		};

		watchdog@f8005000 {
			clocks = <0x1 0x2d>;
			compatible = "cdns,wdt-r1p2";
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x9 0x1>;
			reg = <0xf8005000 0x1000>;
			timeout-sec = <0xa>;
		};
	};

	amba_pl {
		#address-cells = <0x1>;
		#size-cells = <0x1>;
		compatible = "simple-bus";
		ranges;

		gpio@41200000 {
			#gpio-cells = <0x3>;
			clock-names = "s_axi_aclk";
			clocks = <0x1 0xf>;
			compatible = "xlnx,axi-gpio-2.0", "xlnx,xps-gpio-1.00.a";
			gpio-controller;
			reg = <0x41200000 0x10000>;
			xlnx,all-inputs = <0x0>;
			xlnx,all-inputs-2 = <0x0>;
			xlnx,all-outputs = <0x1>;
			xlnx,all-outputs-2 = <0x0>;
			xlnx,dout-default = <0x0>;
			xlnx,dout-default-2 = <0x0>;
			xlnx,gpio-width = <0x8>;
			xlnx,gpio2-width = <0x20>;
			xlnx,interrupt-present = <0x0>;
			xlnx,is-dual = <0x0>;
			xlnx,tri-default = <0xffffffff>;
			xlnx,tri-default-2 = <0xffffffff>;
		};
	};

	chosen {
		bootargs = "console=ttyPS0,115200 earlycon";
		stdout-path = "serial0:115200n8";
	};

	aliases {
		ethernet0 = "/amba/ethernet@e000b000";
		serial0 = "/amba/serial@e0001000";
		spi0 = "/amba/spi@e000d000";
	};

	memory {
		device_type = "memory";
		reg = <0x0 0x20000000>;
	};
};
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Moderator
Moderator
44 Views
Registered: ‎04-24-2017

Re: Linux hangs at "bootconsole [cdns0] disabled" when I try Xilinx Answer 72076

Hi @m3atwad ,

Can you share your project-spec files we can take a look on this one.

Thanks,
Sandeep
PetaLinux Yocto | Embedded SW Support

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Explorer
Explorer
39 Views
Registered: ‎05-25-2016

Re: Linux hangs at "bootconsole [cdns0] disabled" when I try Xilinx Answer 72076

Yup - should I just zip up the project spec folder and attache it?

Also - when you edit the pertalinux-config and set the psu_uart1 is that just saying use uart1 from the hardware design (which I think would be correct) as opposed to uart0 in the PS system?  If yes, does this then flow into the device tree as mine reflects where uart0 is disabled and uart1 is enabled?

If that is the case it looks like the device tree assigns the serial0 to our uart 1 (I can tell by verifying the address with the zynq7000 TRM).  Example device tree line shown below. From the TRM addres 0xe0001000 is the zynq PS uart 1.

serial0 = "/amba/serial@e0001000";

 

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