cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 
Highlighted
Observer
Observer
314 Views
Registered: ‎08-11-2018

Multi-beat IO transactions on Petalinux

Jump to solution

Guys,

                  My problem is that I'm trying to read the contents of a 64 bit axi stream fifo using a 32 bit microblaze. The stream fifo only supports INCR busts, and the issue is that the microblaze only does single beat transactions. So If my FIFO is at 0x3000 for example, and I try to read 64 bits using 'devmem 0x3000 64', I see two back to back transactions, one at 0x3000 for the lower 32 bits and one at 0x3004 for the upper 32 bits. The last transactions hangs the system because the AXI stream fifo IP does not repsond to adddresses outside the base of 0x3000.

                   So in this post here: https://forums.xilinx.com/t5/AXI-Infrastructure/AXI-Stream-FIFO-bug/m-p/939778#M2449 I realized that the microblaze is not setting ARLEN=1, which means that it is only performing single beat transactions. I see the same behavior in the ARM PS as well.

                  So my question for this post is if it's possible to have the processor(arm or microblaze) issue a multi-beat transaction to a particular I/O address. Note that both processors are running Petalinux. Not sure if it is petalinux specific, or if is literally just a function of the processor and is impossible to force. If I can't force these transactions then I have to devise a custom solution to convert the single beat transactions to one multi-beat transaction.

Thanks!

0 Kudos
1 Solution

Accepted Solutions
Highlighted
Observer
Observer
299 Views
Registered: ‎08-11-2018

Okay, so I should've done a forum search, found an answer to my question from 2012: https://forums.xilinx.com/t5/Embedded-Development-Tools/Enable-AX4-Burst-on-M-AXI-DP-port/td-p/279926

So it looks like the microblaze DP Port defaults to AXI4-LITE, which is not capable of multi-burst transactions, because there are no burst instructions available. So it looks like for what I'm trying to do, I'm going to need to create custom logic that will merge two single beats into one beat in both directions.

 

View solution in original post

0 Kudos
1 Reply
Highlighted
Observer
Observer
300 Views
Registered: ‎08-11-2018

Okay, so I should've done a forum search, found an answer to my question from 2012: https://forums.xilinx.com/t5/Embedded-Development-Tools/Enable-AX4-Burst-on-M-AXI-DP-port/td-p/279926

So it looks like the microblaze DP Port defaults to AXI4-LITE, which is not capable of multi-burst transactions, because there are no burst instructions available. So it looks like for what I'm trying to do, I'm going to need to create custom logic that will merge two single beats into one beat in both directions.

 

View solution in original post

0 Kudos