PL configuration under Linux on Zedboard

[pedro_uno]

Hello Guys,

During development I prefer to configure the PL from the Linux command line.  In the past I have used the commands below. Unfortunately that is not working for me anymore.

-bash-4.4$ cp top.bit.bin /lib/firmware/
-bash-4.4$ sudo su
root@linaro-developer# echo top.bit.bin > /sys/class/fpga_manager/fpga0/firmware
bash: echo: write error: Connection timed out

I thought maybe this was something with how I built Petalinux.  I found that FPGA Manager was not enabled in the petalinux-config menu so I enabled it there.  Unfortunately, the petalinux-build command fails when I have that enabled. 

Do I need to enable "FPGA Manager" in the petalinux-config menu in order to configure the PL this way?  I don't remember having to enable this manually before.

PL configuration from Linux seems like an important feature.  Am I going about it the wrong way?

Any advice?

[jordanki]

First off, I haven't been working with a newer Linux kernel that uses the FPGA Manager in lieu of the xdevcfg driver so I'm a novice on this issue. However, the Xilinx Wiki says you need to zero out flags prior to the commands you indicated you're issuing.

[pedro_uno]

Thanks for pointing me to that wiki.  I had not found it.  There might be some things in there that help me. 

It sounds like you have been using this technique for a while, like me.  Over the years, loading the PL has been a moving target. With xdevcfg it started out using bin files. Then they went to bit file format (I didn't get that memo). Now with fpga manager it is back to bin.  Now, they are trying to marry it to device tree blob overlays.  Overlays are just a distraction for what I do.

I did try zeroing the flags but that did not change the behavior when I tried to load the PL configuration.

root@linaro-developer# echo 0 > /sys/class/fpga_manager/fpga0/flags
root@linaro-developer# echo top.bit.bin > /sys/class/fpga_manager/fpga0/firmware
bash: echo: write error: Connection timed out
root@linaro-developer#

The ability to load the PL is critical to my work.

    Pete

[jordanki]

I'm in a similar situation where our hardware is a single development platform for multiple engineers/projects, and we have to remain compatible with another group's hardware setup. We can't modify the boot configuration nor can we update our kernel and root filesystem beyond PetaLinux 2014.4. If I couldn't reprogram within the Linux environment, our development would grind to a halt.

[shabbirk]

Hi @pedro_uno 

May I know what version of Linux/Petalinux you are using?

Best Regards

Shabbir

[pedro_uno]

Shabbir

We are using Petalinux 2019.1 and Vivado 2019.1 for compiling the FPGA.  I run the Linaro "latest" root filesystem on the sd card.  I think it is Debian Stretch.  The Xilinx part is the Zynq 7020 on the regular Zedboard.

[pedro_uno]

On my compilation machine I am running Ubuntu 18.04 LTS.

[pedro_uno]

So, does anyone know if PL configuration using FPGA Manager is broken in Vivado 2019.1?

[pedro_uno]

Now I have the same problem on a PicoZed board.  Has something fundamental changed with configuring the PL from Linux?

-bash-4.4$ sudo mkdir /lib/firmware
-bash-4.4$ sudo chmod 777 /lib/firmware/
-bash-4.4$ cp implement/results/top.bit.bin /lib/firmware/
-bash-4.4$ sudo su
root@linaro-developer:/home/pedro/github/picobuntu# echo top.bit.bin > /sys/class/fpga_manager/fpga0/firmware
bash: echo: write error: Connection timed out

[pedro_uno]

I found somewhere that this driver now accepts vivado generated .bin files in addition to bootgen created files.  I tried configuring with that vivado bin file and the driver rejected it.

Here I try it both ways.

root@linaro-developer:/home/pedro# echo top.bin > /sys/class/fpga_manager/fpga0/firmware
bash: echo: write error: Invalid argument
root@linaro-developer:/home/pedro# echo top.bit.bin > /sys/class/fpga_manager/fpga0/firmware
bash: echo: write error: Connection timed out
root@linaro-developer:/home/pedro#

[pedro_uno]

After a lot of experimentation I noticed that an old .bin file built for a Microzed board loaded and ran fine using the fpga manager driver as shown above.

I think this means that there is nothing wrong with fpga manager on my petalinux build.  Instead it was somehow the .bin file I was using.

I think it might be due to the fact that I had petalinux in my command path when I ran bootgen.  There is a bootgen under the vivado installation and another under petalinux.  Maybe that was the problem. The working .bin file was compiled with only vivado in my path.  If you get the "Connection timed out" message suspect your .bin file.

Anyway, I am up and running again.

    Pete