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joancab
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Registered: ‎05-11-2015

PL interrupts to Linux, how to?

I need some hardware to trigger some action in Linux in zynq ultrascale.

So far I have my Vivado hardware built and exported and I can build petalinux ignoring the interrupts.

I couldn't find any good guidance on that, neither from Xilinx or others. Neither this:

https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18842191/Linux+GIC+Driver

or this:

https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18842490/Testing+UIO+with+Interrupt+on+Zynq+Ultrascale

have help.

I'm stuck with the device tree. How do I add a node for an interrupt?

 

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joancab
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Registered: ‎05-11-2015

I also followed the "solution" here

https://forums.xilinx.com/t5/Embedded-Linux/PL-PS-interrupt-handling-with-GIC-in-linux-kernel-module/m-p/1127736

but I couldn't see the interrupt listed

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stephenm
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Registered: ‎09-12-2007

What is the interrupt source? is it an IP, or a pin? Is the pin type set to interrupt? Can you share your pl.dtsi?

What do you see in cat /proc/interrupts?

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joancab
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The interrupt source is a custom IP that processes some data, writes to the PS memory using a master AXI and when done, it triggers some linux software to further process that data. 

This is (one of) my cat /process/interrupts:

root@slt:~# cat /proc/interrupts
           CPU0       CPU1
  3:       2912       2237     GICv2  30 Level     arch_timer
  6:          0          0     GICv2  67 Level     zynqmp_ipi
  7:          0          0     GICv2 175 Level     arm-pmu
  8:          0          0     GICv2 176 Level     arm-pmu
 12:          0          0     GICv2 156 Level     zynqmp-dma
 13:          0          0     GICv2 157 Level     zynqmp-dma
 14:          0          0     GICv2 158 Level     zynqmp-dma
 15:          0          0     GICv2 159 Level     zynqmp-dma
 16:          0          0     GICv2 160 Level     zynqmp-dma
 17:          0          0     GICv2 161 Level     zynqmp-dma
 18:          0          0     GICv2 162 Level     zynqmp-dma
 19:          0          0     GICv2 163 Level     zynqmp-dma
 21:          0          0     GICv2 109 Level     zynqmp-dma
 22:          0          0     GICv2 110 Level     zynqmp-dma
 23:          0          0     GICv2 111 Level     zynqmp-dma
 24:          0          0     GICv2 112 Level     zynqmp-dma
 25:          0          0     GICv2 113 Level     zynqmp-dma
 26:          0          0     GICv2 114 Level     zynqmp-dma
 27:          0          0     GICv2 115 Level     zynqmp-dma
 28:          0          0     GICv2 116 Level     zynqmp-dma
 30:          0          0     GICv2  95 Level     eth0, eth0
 32:          0          0     GICv2  49 Level     cdns-i2c
 33:          0          0     GICv2  42 Level     ff960000.memory-controller
 34:          0          0     GICv2  57 Level     axi-pmon, axi-pmon
 35:          0          0     GICv2 155 Level     axi-pmon, axi-pmon
 41:         36          0     GICv2  47 Level     ff0f0000.spi
 42:          0          0     GICv2  58 Level     ffa60000.rtc
 43:          0          0     GICv2  59 Level     ffa60000.rtc
 44:        278          0     GICv2  80 Level     mmc0
 45:        225          0     GICv2  81 Level     mmc1
 46:         74          0     GICv2  53 Level     xuartps
 48:          0          0     GICv2  84 Edge      ff150000.watchdog
 49:          0          0     GICv2  88 Level     ams-irq
 51:          1          0     GICv2 101 Level     dwc3-otg
IPI0:      1726        989       Rescheduling interrupts
IPI1:        16         45       Function call interrupts
IPI2:         0          0       CPU stop interrupts
IPI3:         0          0       CPU stop (for crash dump) interrupts
IPI4:        14        195       Timer broadcast interrupts
IPI5:         0          0       IRQ work interrupts
IPI6:         0          0       CPU wake-up interrupts
Err:

 

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joancab
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A bit of progress, I could see the interrupt with this  system-user-dtsi:

/include/ "system-conf.dtsi"
/ {
	chosen {
		bootargs = "earlycon clk_ignore_unused uio_pdrv_genirq.of_id=generic-uio";
		stdout-path = "serial0:115200n8";
	};
	pl_int@0000 {
		compatible = "generic-uio";
		//interrupt-controller;
		interrupt-parent = <&gic>;
		interrupts = <0 90 4>;
        };

};

After boot:

root@slt:~# cat /proc/interrupts
           CPU0       CPU1
  3:       2054       2878     GICv2  30 Level     arch_timer
  6:          0          0     GICv2  67 Level     zynqmp_ipi
  7:          0          0     GICv2 175 Level     arm-pmu
  8:          0          0     GICv2 176 Level     arm-pmu
 12:          0          0     GICv2 156 Level     zynqmp-dma
 13:          0          0     GICv2 157 Level     zynqmp-dma
 14:          0          0     GICv2 158 Level     zynqmp-dma
 15:          0          0     GICv2 159 Level     zynqmp-dma
 16:          0          0     GICv2 160 Level     zynqmp-dma
 17:          0          0     GICv2 161 Level     zynqmp-dma
 18:          0          0     GICv2 162 Level     zynqmp-dma
 19:          0          0     GICv2 163 Level     zynqmp-dma
 21:          0          0     GICv2 109 Level     zynqmp-dma
 22:          0          0     GICv2 110 Level     zynqmp-dma
 23:          0          0     GICv2 111 Level     zynqmp-dma
 24:          0          0     GICv2 112 Level     zynqmp-dma
 25:          0          0     GICv2 113 Level     zynqmp-dma
 26:          0          0     GICv2 114 Level     zynqmp-dma
 27:          0          0     GICv2 115 Level     zynqmp-dma
 28:          0          0     GICv2 116 Level     zynqmp-dma
 30:          0          0     GICv2  95 Level     eth0, eth0
 32:          0          0     GICv2  49 Level     cdns-i2c
 33:          0          0     GICv2  42 Level     ff960000.memory-controller
 34:          0          0     GICv2  57 Level     axi-pmon, axi-pmon
 35:          0          0     GICv2 155 Level     axi-pmon, axi-pmon
 36:          0          0     GICv2 150 Level     nwl_pcie:misc
 41:         36          0     GICv2  47 Level     ff0f0000.spi
 42:          0          0     GICv2  58 Level     ffa60000.rtc
 43:          0          0     GICv2  59 Level     ffa60000.rtc
 44:        398          0     GICv2  80 Level     mmc0
 45:        358          0     GICv2  81 Level     mmc1
 46:        106          0     GICv2  53 Level     xuartps
 48:          0          0     GICv2  84 Edge      ff150000.watchdog
 49:          0          0     GICv2  88 Level     ams-irq
 50:          0          0     GICv2 122 Level     pl_int
 53:          1          0     GICv2 101 Level     dwc3-otg
IPI0:      1523       1304       Rescheduling interrupts
IPI1:        15        112       Function call interrupts
IPI2:         0          0       CPU stop interrupts
IPI3:         0          0       CPU stop (for crash dump) interrupts
IPI4:       163         50       Timer broadcast interrupts
IPI5:         0          0       IRQ work interrupts
IPI6:         0          0       CPU wake-up interrupts
Err:

So I think now the rest is setting the ISR in software (?)

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stephenm
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Registered: ‎09-12-2007

Should the int not be 89 + 32 (121)? 

 

joancab
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Registered: ‎05-11-2015

Yes, I think it was a 90 post-edited to 89

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