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Visitor nboone
Visitor
8,019 Views
Registered: ‎04-14-2015

PS - PL BRAM access via UIO driver

Hi,

I'm trying to create an interface between the PS and the PL on the Zynq using BRAM access over AXI. I have my BRAM set up in the PL and can access it under Petalinux using UIO drivers. The BRAM is configured as a true dual port RAM block seen as 32x2048 on the AXI side (connected to the PS) and 16x4096 on the PL side. I can access the RAM fine with Petalinux using the UIO methods (opening /dev/uio, mapping and getting a pointer) and through the devmem command line tool. However when I read the memory the values returned aren't as expected.

 

If I read the memory from position 0 for 64bits using the devmem tool I get the first 32 bits then 32bits from position 4, I cannot access the memory at addresses 1-3.

For example with the memory contents 0x00000000,0x00000001,0x00000002,0x00000003,0x00000004

Reading 64bits from address 0 I should expect 0x00000000 00000001 returned however I get 0x00000000 00000004

 

Am I missing something fundamental about the memory access here or is this behaviour unexpected?

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Visitor mattyj207
Visitor
7,501 Views
Registered: ‎10-06-2015

Re: PS - PL BRAM access via UIO driver

Were you ever able to resolve this? I'm in a similar position. I can successfully open the UIO device and mmap it, but then when it comes time to read or write a register the chip just hangs.

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