02-03-2020 05:04 AM
We are developing a system using a Zynq-7020 with a Micron MT29F8G08ADADAH4 NAND for persistent storage. For the NAND we enabled on-die ECC and on flash block tables by adding this to the devicetree (system-user.dtsi)
nand-ecc-mode = "on-die";
A problem occurs when we boot the system with fully erased flashes that have no bad block table yet. It creates a bad block table and wants to write it to flash however it gives a -524 error (not supported). This will mark the badblock table blocks as bad and on the next boot it will give a different error. To reproduce the problem I need to scrub the flash in U-Boot.
After a lot of investigation I was able to pinpoint the issue. The following is the stackdump when the problem occurs;
[<c04531d8>] (nand_op_parser_exec_op) from [<c04583f4>] (nand_write_data_op+0x90/0x110)
[<c04583f4>] (nand_write_data_op) from [<c04585d8>] (nand_write_page_raw+0x6c/0xb8)
[<c04585d8>] (nand_write_page_raw) from [<c045b958>] (micron_nand_write_page_on_die_ecc+0x44/0x60)
[<c045b958>] (micron_nand_write_page_on_die_ecc) from [<c0458c60>] (nand_do_write_ops+0x310/0x468)
[<c0458c60>] (nand_do_write_ops) from [<c04590cc>] (nand_write_oob+0x80/0x8c)
[<c04590cc>] (nand_write_oob) from [<c0459ab0>] (write_bbt+0x528/0x684)
[<c0459ab0>] (write_bbt) from [<c045a720>] (nand_create_bbt+0x518/0x5a8)
[<c045a720>] (nand_create_bbt) from [<c04578c0>] (nand_scan_with_ids+0x18e4/0x19b0)
[<c04578c0>] (nand_scan_with_ids) from [<c045cbb4>] (pl353_nand_probe+0x168/0x1f8)
The function nand_write_data_op creates an operation which is not supported by the pl353 driver in the “static const struct nand_op_parser pl353_nfc_op_parser” table.
I added the operation in the table (as shown in the patch) and now it seems to work correctly but needs to be tested a lot more.
I this a good solution?
02-21-2020 02:42 AM
As with the other post for the NAND driver I just reported the issue to the development team. Thanks again for your effort on the debug part.
03-18-2020 10:28 AM
The development team already pushed a patch to the public Xilinx linux tree: